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[/] [scarts/] [trunk/] [processor/] [VHDL/] [ext_modules/] [ext_counter/] [ext_counter_ent.vhd] - Rev 3
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----------------------------------------------------------------------- -- This file is part of SCARTS. -- -- SCARTS is free software: you can redistribute it and/or modify -- it under the terms of the GNU General Public License as published by -- the Free Software Foundation, either version 3 of the License, or -- (at your option) any later version. -- -- SCARTS is distributed in the hope that it will be useful, -- but WITHOUT ANY WARRANTY; without even the implied warranty of -- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -- GNU General Public License for more details. -- -- You should have received a copy of the GNU General Public License -- along with SCARTS. If not, see <http://www.gnu.org/licenses/>. ----------------------------------------------------------------------- ------------------------------------------------------------------------------- -- Title : 7 Segment Display Architecture -- Project : SCARTS - Scalable Processor for Embedded Applications in -- Realtime Environment ------------------------------------------------------------------------------- -- File : ext_sysctrl_ent.vhd -- Author : Dipl. Ing. Martin Delvai -- Company : TU Wien - Institut fr technische Informatik -- Created : 2002-02-11 -- Last update: 2009-04-29 -- Platform : SUN Solaris ------------------------------------------------------------------------------- -- Description: -- ------------------------------------------------------------------------------- -- Copyright (c) 2002 ------------------------------------------------------------------------------- -- Revisions : -- Date Version Author Description -- 2002-02-11 1.0 delvai Created ------------------------------------------------------------------------------- -------------------------------------------------------------------------------- -- LIBRARY -------------------------------------------------------------------------------- LIBRARY IEEE; USE IEEE.std_logic_1164.all; USE work.pkg_basic.all; use work.pkg_counter.all; ---------------------------------------------------------------------------------- -- ENTITY ---------------------------------------------------------------------------------- entity ext_counter is port( clk : IN std_logic; extsel : in std_ulogic; exti : in module_in_type; exto : out module_out_type ); end ext_counter; ---------------------------------------------------------------------------------- -- END ENTITY ----------------------------------------------------------------------------------