Subversion Repositories scarts

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#               top_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#               assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name FAMILY "Cyclone IV E"
set_global_assignment -name DEVICE EP4CE115F29C7
set_global_assignment -name TOP_LEVEL_ENTITY top
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.2 SP3"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "17:52:19  APRIL 04, 2008"
set_global_assignment -name LAST_QUARTUS_VERSION "10.0 SP1"
set_global_assignment -name EDA_SIMULATION_TOOL "ModelSim (VHDL)"
set_global_assignment -name EDA_OUTPUT_DATA_FORMAT VHDL -section_id eda_simulation
set_global_assignment -name USE_GENERATED_PHYSICAL_CONSTRAINTS OFF -section_id eda_palace
set_global_assignment -name USER_LIBRARIES db


set_location_assignment PIN_G9 -to D_TxD
set_location_assignment PIN_G12 -to D_RxD
set_location_assignment PIN_Y2 -to db_clk
set_location_assignment PIN_M23 -to rst
#set_location_assignment PIN_D14 -to miso
#set_location_assignment PIN_A15 -to mosi
#set_location_assignment PIN_F14 -to sck



set_global_assignment -name SMART_RECOMPILE ON
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name LL_ROOT_REGION ON -section_id "Root Region"
set_global_assignment -name LL_MEMBER_STATE LOCKED -section_id "Root Region"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_instance_assignment -name WEAK_PULL_UP_RESISTOR ON -to rst
set_global_assignment -name TIMEQUEST_MULTICORNER_ANALYSIS OFF
set_global_assignment -name MUX_RESTRUCTURE AUTO
set_global_assignment -name STRATIX_DEVICE_IO_STANDARD "3.3-V LVTTL"
set_global_assignment -name MISC_FILE top.dpf
set_location_assignment PIN_G18 -to digits[0].SegA
set_location_assignment PIN_F22 -to digits[0].SegB
set_location_assignment PIN_E17 -to digits[0].SegC
set_location_assignment PIN_L26 -to digits[0].SegD
set_location_assignment PIN_L25 -to digits[0].SegE
set_location_assignment PIN_J22 -to digits[0].SegF
set_location_assignment PIN_H22 -to digits[0].SegG
set_location_assignment PIN_M24 -to digits[1].SegA
set_location_assignment PIN_Y22 -to digits[1].SegB
set_location_assignment PIN_W21 -to digits[1].SegC
set_location_assignment PIN_W22 -to digits[1].SegD
set_location_assignment PIN_W25 -to digits[1].SegE
set_location_assignment PIN_U23 -to digits[1].SegF
set_location_assignment PIN_U24 -to digits[1].SegG
set_location_assignment PIN_AA25 -to digits[2].SegA
set_location_assignment PIN_AA26 -to digits[2].SegB
set_location_assignment PIN_Y25 -to digits[2].SegC
set_location_assignment PIN_W26 -to digits[2].SegD
set_location_assignment PIN_Y26 -to digits[2].SegE
set_location_assignment PIN_W27 -to digits[2].SegF
set_location_assignment PIN_W28 -to digits[2].SegG
set_location_assignment PIN_V21 -to digits[3].SegA
set_location_assignment PIN_U21 -to digits[3].SegB
set_location_assignment PIN_AB20 -to digits[3].SegC
set_location_assignment PIN_AA21 -to digits[3].SegD
set_location_assignment PIN_AD24 -to digits[3].SegE
set_location_assignment PIN_AF23 -to digits[3].SegF
set_location_assignment PIN_Y19 -to digits[3].SegG
set_location_assignment PIN_AB19 -to digits[4].SegA
set_location_assignment PIN_AA19 -to digits[4].SegB
set_location_assignment PIN_AG21 -to digits[4].SegC
set_location_assignment PIN_AH21 -to digits[4].SegD
set_location_assignment PIN_AE19 -to digits[4].SegE
set_location_assignment PIN_AF19 -to digits[4].SegF
set_location_assignment PIN_AE18 -to digits[4].SegG
set_location_assignment PIN_AD18 -to digits[5].SegA
set_location_assignment PIN_AC18 -to digits[5].SegB
set_location_assignment PIN_AB18 -to digits[5].SegC
set_location_assignment PIN_AH19 -to digits[5].SegD
set_location_assignment PIN_AG19 -to digits[5].SegE
set_location_assignment PIN_AF18 -to digits[5].SegF
set_location_assignment PIN_AH18 -to digits[5].SegG
set_location_assignment PIN_AA17 -to digits[6].SegA
set_location_assignment PIN_AB16 -to digits[6].SegB
set_location_assignment PIN_AA16 -to digits[6].SegC
set_location_assignment PIN_AB17 -to digits[6].SegD
set_location_assignment PIN_AB15 -to digits[6].SegE
set_location_assignment PIN_AA15 -to digits[6].SegF
set_location_assignment PIN_AC17 -to digits[6].SegG
set_location_assignment PIN_AD17 -to digits[7].SegA
set_location_assignment PIN_AE17 -to digits[7].SegB
set_location_assignment PIN_AG17 -to digits[7].SegC
set_location_assignment PIN_AH17 -to digits[7].SegD
set_location_assignment PIN_AF17 -to digits[7].SegE
set_location_assignment PIN_AG18 -to digits[7].SegF
set_location_assignment PIN_AA14 -to digits[7].SegG
set_global_assignment -name RAPID_RECOMPILE_MODE ON
set_global_assignment -name OUTPUT_IO_TIMING_ENDPOINT "NEAR END"
set_instance_assignment -name IO_STANDARD "2.5 V" -to digits[0].SegA
set_instance_assignment -name IO_STANDARD "2.5 V" -to digits[0].SegB
set_instance_assignment -name IO_STANDARD "2.5 V" -to digits[0].SegC
set_global_assignment -name VHDL_FILE ../../../VHDL/common/scarts_amba_pkg.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/common/scarts_pkg.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/scarts_core_pkg.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/altera/boot_rom.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/vectab.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/byteram.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/core.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/dram.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/iram.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/prog.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/regf.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/regfram.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/scarts.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/sysc.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/brom.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/rs232.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/bpt.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/scarts_core/wpt.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/ext_modules/ext_Dis7Seg/ext_Dis7Seg.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/ext_modules/ext_Dis7Seg/ext_Dis7Seg_ent.vhd
set_global_assignment -name VHDL_FILE ../../../VHDL/ext_modules/ext_Dis7Seg/pkg_Dis7Seg.vhd
set_global_assignment -name VHDL_FILE ../VHDL/altera_pll.vhd
set_global_assignment -name VHDL_FILE ../VHDL/top_pkg.vhd
set_global_assignment -name VHDL_FILE ../VHDL/top.vhd
set_global_assignment -name SDC_FILE top.sdc
set_global_assignment -name QIP_FILE ../VHDL/altera_pll.qip
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top