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[/] [scarts/] [trunk/] [toolchain/] [scarts-binutils/] [binutils-2.19.1/] [cgen/] [opc-asmdis.scm] - Rev 6

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; Assembler/disassembler support generator.
; Copyright (C) 2000, 2001, 2005, 2009 Red Hat, Inc.
; This file is part of CGEN.
; Assembler support.
"Generating parse switch ...\n""\
const char * @arch@_cgen_parse_operand
  (CGEN_CPU_DESC, int, const char **, CGEN_FIELDS *);
 
/* Main entry point for operand parsing.
 
   This function is basically just a big switch statement.  Earlier versions
   used tables to look up the function to use, but
   - if the table contains both assembler and disassembler functions then
     the disassembler contains much of the assembler and vice-versa,
   - there's a lot of inlining possibilities as things grow,
   - using a switch statement avoids the function call overhead.
 
   This function could be moved into `parse_insn_normal', but keeping it
   separate makes clear the interface between `parse_insn_normal' and each of
   the handlers.  */
 
const char *
@arch@_cgen_parse_operand (CGEN_CPU_DESC cd,
			   int opindex,
			   const char ** strp,
			   CGEN_FIELDS * fields)
{
  const char * errmsg = NULL;
  /* Used by scalar operands that still need to be parsed.  */
  "" junk ATTRIBUTE_UNUSED;
 
  switch (opindex)
    {
""
    default :
      /* xgettext:c-format */
      fprintf (stderr, _(\"Unrecognized field %d while parsing.\\n\"), opindex);
      abort ();
  }
 
  return errmsg;
}\n\n"; Assembler initialization C code
; Code is appended during processing.
""; Return C code to define the assembler init function.
; This is called after opcode_open.
"\
void
@arch@_cgen_init_asm (CGEN_CPU_DESC cd)
{
  @arch@_cgen_init_opcode_table (cd);
  @arch@_cgen_init_ibld_table (cd);
  cd->parse_handlers = & @arch@_cgen_parse_handlers[0];
  cd->parse_operand = @arch@_cgen_parse_operand;
#ifdef CGEN_ASM_INIT_HOOK
CGEN_ASM_INIT_HOOK
#endif
""}\n\n"; Generate C code that is inserted into the assembler source.
"Generating ""-asm.in ...\n"; No need for copyright, appended to file with one.
"\n""\n""parse"; Disassembler support.
"Generating print switch ...\n""\
void @arch@_cgen_print_operand
  (CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
 
/* Main entry point for printing operands.
   XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
   of dis-asm.h on cgen.h.
 
   This function is basically just a big switch statement.  Earlier versions
   used tables to look up the function to use, but
   - if the table contains both assembler and disassembler functions then
     the disassembler contains much of the assembler and vice-versa,
   - there's a lot of inlining possibilities as things grow,
   - using a switch statement avoids the function call overhead.
 
   This function could be moved into `print_insn_normal', but keeping it
   separate makes clear the interface between `print_insn_normal' and each of
   the handlers.  */
 
void
@arch@_cgen_print_operand (CGEN_CPU_DESC cd,
			   int opindex,
			   void * xinfo,
			   CGEN_FIELDS *fields,
			   void const *attrs ATTRIBUTE_UNUSED,
			   bfd_vma pc,
			   int length)
{
  disassemble_info *info = (disassemble_info *) xinfo;
 
  switch (opindex)
    {
""
    default :
      /* xgettext:c-format */
      fprintf (stderr, _(\"Unrecognized field %d while printing insn.\\n\"),
	       opindex);
    abort ();
  }
}\n\n"; Disassembler initialization C code.
; Code is appended during processing.
""; Return C code to define the disassembler init function.
"
void
@arch@_cgen_init_dis (CGEN_CPU_DESC cd)
{
  @arch@_cgen_init_opcode_table (cd);
  @arch@_cgen_init_ibld_table (cd);
  cd->print_handlers = & @arch@_cgen_print_handlers[0];
  cd->print_operand = @arch@_cgen_print_operand;
""}\n\n"; Generate C code that is inserted into the disassembler source.
"Generating ""-dis.in ...\n"; No need for copyright, appended to file with one.
"\n""\n""print"

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