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[/] [scarts/] [trunk/] [toolchain/] [scarts-binutils/] [binutils-2.19.1/] [cgen/] [sid.scm] - Rev 6

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; Simulator generator support routines.
; Copyright (C) 2000, 2005, 2009 Red Hat, Inc.
; This file is part of CGEN.
; One goal of this file is to provide cover functions for all methods.
; i.e. this file fills in the missing pieces of the interface between
; the application independent part of CGEN (i.e. the code loaded by read.scm)
; and the application dependent part (i.e. sim-*.scm).
; `send' is not intended to appear in sim-*.scm.
; [It still does but that's to be fixed.]
; Specify which application.
; Misc. state info.
; Currently supported options:
; with-scache
;	generate code to use the scache engine
; with-pbb
;	generate code to use the pbb engine
; with-sem-frags
;	generate semantic fragment engine (requires with-pbb)
; with-profile fn|sw
;	generate code to do profiling in the semantic function
;	code (fn) or in the semantic switch (sw)
; with-multiple-isa
;	enable multiple-isa support (e.g. arm+thumb)
;	??? wip.
; copyright fsf|redhat
;	emit an FSF or Red Hat copyright (temporary, pending decision)
; package gnusim|cygsim
;	indicate the software package
; #t if the scache is being used
; #t if we're generating profiling code
; Each of the function and switch semantic code can have profiling.
; The options as passed are stored in -with-profile-{fn,sw}?, and
; -with-profile? is set at code generation time.
; #t if multiple isa support is enabled
; #t if semantics are generated as pbb computed-goto engine
; #t if the semantic fragment engine is to be used.
; This involves combining common fragments of each insn into one.
; String containing copyright text.
; String containing text defining the package we're generating code for.
; Initialize the options.
; Handle an option passed in from the command line.
"fn""sw""invalid with-profile value""fsf""redhat""invalid copyright value""gnusim""cygsim""invalid package value""unknown option"; #t if we're currently generating a pbb engine.
; #t if the cpu can execute insns parallely.
; This one isn't passed on the command line, but we follow the convention
; of prefixing these things with `with-'.
; While processing operand reading (or writing), parallel execution support
; needs to be turned off, so it is up to the appropriate cgen-foo.c proc to
; set-with-parallel?! appropriately.
; Kind of parallel support.
; If 'read, read pre-processing is done.
; If 'write, write post-processing is done.
; ??? At present we always use write post-processing, though the previous
; version used read pre-processing.  Not sure supporting both is useful
; in the long run.
; #t if parallel support is provided by read pre-processing.
; #t if parallel support is provided by write post-processing.
; Cover functions for various methods.
; Return the C type of something.  This isn't always a mode.
; Return the C type of an index's value or #f if not needed (scalar).
; Misc. utilities.
; Return reference to hardware element SYM.
; ISAS is a list of <isa> objects.
; The idea is that in multiple isa architectures (e.g. arm) the elements
; common to all isas are kept in one class and the elements specific to each
; isa are kept in separate classes.
"current_cpu->@cpu@_hardware.""current_cpu->hardware."; Attribute support.
; Return C code to fetch a value from instruction memory.
; PC-VAR is the C expression containing the address of the start of the
; instruction.
;
; We don't bother trying to handle bitsizes that don't have a
; corresponding GETIMEM method.  Doing so would require us to take
; endianness into account just to ensure that the requested bits end
; up at the proper place in the result.  It's easier just to make the
; caller ask us for something we can do directly.
;
; ??? Aligned/unaligned support?
"current_cpu->GETIMEM""UQI""UHI""USI""bad bitsize argument to gen-ifetch"" (pc, "" + "")"; Return definition of an object's attributes.
; This is like gen-obj-attr-defn, except split for sid.
; TYPE is one of 'ifld, 'hw, 'operand, 'insn.
; [Only 'insn is currently needed.]
; ALL-ATTRS is an ordered alist of all attributes.
; "ordered" means all the non-boolean attributes are at the front and
; duplicate entries have been removed.
"{ "","" 0"; drop the leading ","
; FIXME: Are we missing attr-prefix here?
", "" }"; Instruction field support code.
; Return a <c-expr> object of the value of an ifield.
; ??? Perhaps a better way would be to defer evaluating the src of a
; set until the method processing the dest.
""; Type system.
; Methods:
; gen-type - return C code representing the type
; gen-sym-decl - generate decl using the provided symbol
; gen-sym-get-macro - generate GET macro for accessing CPU elements
; gen-sym-set-macro - generate SET macro for accessing CPU elements
; Scalar type
"  /* "" */\n""  "" "";\n"; Array type
"  /* "" */\n""  "" "";\n"; Return a reference to the array.
; SYM is the name of the array.
; INDEX is either a single index object or a (possibly empty) list of objects,
; one object per dimension.
"[""]"; Integers
;
;(method-make!
; <integer> 'gen-type
; (lambda (self)
;   (mode:c-type (mode-find (elm-get self 'bits)
;			   (if (has-attr? self 'UNSIGNED)
;			       'UINT 'INT)))
;   )
;)
;
;(method-make! <integer> 'gen-sym-decl (lambda (self sym comment) ""))
;(method-make! <integer> 'gen-sym-get-macro (lambda (self sym comment) ""))
;(method-make! <integer> 'gen-sym-set-macro (lambda (self sym comment) ""))
; Hardware descriptions support code.
;
; Various operations are required for each h/w object to support the various
; things the simulator will want to do with it.
;
; Methods:
; gen-decl
; gen-write     - Same as gen-read except done on output operands
; cxmake-get    - Return a <c-expr> object to fetch the value.
; gen-set-quiet - Set the value.
;                 ??? Could just call this gen-set as there is no gen-set-trace
;                 but for consistency with the messages passed to operands
;                 we use this same.
; gen-type      - C type to use to record value.
;                 ??? Delete and just use get-mode?
; save-index?   - return #t if an index needs to be saved for parallel
;                 execution post-write processing
; gen-profile-decl
; gen-record-profile
; get-mode
; gen-profile-locals
; gen-sym-decl  - Return a C declaration using the provided symbol.
; gen-sym-get-macro - Generate default GET access macro.
; gen-sym-set-macro - Generate default SET access macro.
; gen-ref       - Return a C reference to the object.
; Generate CPU state struct entries.
""; Return a C reference to a hardware object.
; Each hardware type must provide its own gen-write method.
"gen-write method not overridden:"; gen-type handler, must be overridden
"gen-type not overridden:"""; Default gen-record-profile method.
""; nothing to do
; Default cxmake-get method.
; Return a <c-expr> object of the value of SELF.
; ESTATE is the current rtl evaluator state.
; INDEX is a <hw-index> object.  It must be an ifield.
; SELECTOR is a hardware selector RTX.
;(if (not (eq? 'ifield (hw-index:type index)))
;    (error "not an ifield hw-index" index))
; PC support
; 'gen-set-quiet helper for PC values.
; NEWVAL is a <c-expr> object of the value to be assigned.
; If OPTIONS contains #:direct, set the PC directly, bypassing semantic
; code considerations.
; ??? OPTIONS support wip.  Probably want a new form (or extend existing form)
; of rtx: that takes a variable number of named arguments.
; ??? Another way to get #:direct might be (raw-reg h-pc).
"Not a PC:""npc = "";"" br_status = BRANCH_CACHEABLE;"" br_status = BRANCH_UNCACHEABLE;"" current_cpu->delay_slot_p = true;"" current_cpu->delayed_branch_address = npc;\n""\n""current_cpu->delayed_branch ("", npc, status);\n""current_cpu->branch ("", npc, status);\n"; Handle updates of the pc during parallel execution.
; This is done in a post-processing pass after semantic evaluation.
; SFMT is the <sformat>.
; OP is the operand.
; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
; during semantic evaluation.
;
; ??? This wouldn't be necessary if gen-set-quiet were a virtual method.
; At this point I'm reluctant to willy nilly make methods virtual.
"  "" ("")""if ("") {\n""  vpc = current_cpu->skip (vpc);\n""  npc = current_cpu->skip (pc);\n""}\n"; Registers.
; Forward these methods onto TYPE.
; For parallel instructions supported by queueing outputs for later update,
; return a boolean indicating if an index needs to be recorded.
; An example of when the index isn't needed is if the index can be determined
; during extraction.
; For array registers, we need to store away the index. 
; Handle updates of registers during parallel execution.
; This is done in a post-processing pass after semantic evaluation.
; SFMT is the <sformat>.
; OP is the <operand>.
; ACCESS-MACRO is the runtime C macro to use to fetch indices computed
; during semantic evaluation.
; FIXME: May need mode of OP.
; First get a hw-index object to use during indexing.
; Some indices, e.g. memory addresses, are computed during semantic
; evaluation.  Others are computed during the extraction phase.
"  "" ("")""  /* "" */\n""  unsigned long "";\n"; FIXME: Need to handle scalars.
;(send index 'gen-extracted-field-value)
; Utilities to generate register accesses via cover functions.
"current_cpu->"" ("""")""current_cpu->"" ("""", "");\n"; Utility to build a <c-expr> object to fetch the value of a register.
; If the register is accessed via a cover function/macro, do it.
; Otherwise fetch the value from the cached address or from the CPU struct.
; FIXME: redo test
"* "; raw-reg: support
; ??? raw-reg: support is wip
; Utilities to generate C code to assign a variable to a register.
; FIXME: redo test
"* "" = "";\n"" = "";\n"; raw-reg: support
; ??? wip
" = "";\n"; Return method name of access function.
; Common elements have no prefix.
; Elements specific to a particular isa are prefixed with @prefix@_.
"_""""_get""_""""_set"; Memory support.
"current_cpu->GETMEM""""ASI"" (""pc, """", "")""current_cpu->SETMEM""""ASI"" (""pc, """", "", "");\n"""""""; For parallel instructions supported by queueing outputs for later update,
; return the type of the index or #f if not needed.
; In the case of the complete memory address being an immediate
; argument, we can return #f (later).
"  "" ("")"; Immediates, addresses.
; Forward these methods onto TYPE.
"gen-write of <hw-immediate> shouldn't happen"; FIXME.
"ADDR"""""""; Return a <c-expr> object of the value of SELF.
; ESTATE is the current rtl evaluator state.
; INDEX is a hw-index object.  It must be an ifield.
; Needed because we record our own copy of the ifield in ARGBUF.
; SELECTOR is a hardware selector RTX.
"not an ifield hw-index""gen-write of <hw-address> shouldn't happen"; FIXME: revisit.
"IADDR"; Return a <c-expr> object of the value of SELF.
; ESTATE is the current rtl evaluator state.
; INDEX is a <hw-index> object.  It must be an ifield.
; Needed because we record our own copy of the ifield in ARGBUF,
; *and* because we want to record in the result the 'CACHED attribute
; since instruction addresses based on ifields are fixed [and thus cacheable].
; SELECTOR is a hardware selector RTX.
"not an ifield hw-index"; ??? Perhaps a better way would be to defer evaluating the src of a
; set until the method processing the dest.
""; Hardware index support code.
; Return the index to use by the gen-write method.
; In the cases where this is needed (the index isn't known until insn
; execution time), the index is computed along with the value to be stored,
; so this is easy.
" ("")"; Return the name of the PAREXEC structure member holding a hardware index
; for operand OP.
"_idx"; Cover fn to hardware indices to generate the actual C code.
; INDEX is the hw-index object (i.e. op:index).
; The result is a string of C code.
; FIXME:wip
""; special case UINT to cut down on unnecessary verbosity.
; ??? May wish to handle more similarily.
"(("") "")""""-gen-hw-index-raw: invalid index:"; Same as -gen-hw-index-raw except used where speedups are possible.
; e.g. doing array index calcs at extraction time.
"""(("") "")""""-gen-hw-index: invalid index:"; Return a <c-expr> object of the value of a hardware index.
; If MODE is VOID, abort.
"hw-index:cxmake-get: result needs a mode"; FIXME: Temporary hack to generate same code as before.
; Hardware selector support code.
; Generate C code for SEL.
; Instruction operand support code.
; Methods:
; gen-type      - Return C type to use to hold operand's value.
; gen-read      - Record an operand's value prior to parallely executing
;                 several instructions.  Not used if gen-write used.
; gen-write     - Write back an operand's value after parallely executing
;                 several instructions.  Not used if gen-read used.
; cxmake-get    - Return C code to fetch the value of an operand.
; gen-set-quiet - Return C code to set the value of an operand.
; gen-set-trace - Return C code to set the value of an operand, and print
;                 a result trace message.  ??? Ideally this will go away when
;                 trace record support is complete.
; Return the C type of an operand.
; Generally we forward things on to TYPE, but for the actual type we need to
; use the get-mode method.
;(method-make-forward! <operand> 'type '(gen-type))
; First get the mode.
; If default mode, use the type's type.
; Extra pc operand methods.
; The enclosing function must set `pc' to the correct value.
"pc"; Default gen-read method.
; This is used to help support targets with parallel insns.
; Either this or gen-write (but not both) is used.
"  "" ("") = "; Pass #f for the index -> use the operand's builtin index.
; Ditto for the selector.
";\n"; Forward gen-write onto the <hardware> object.
; If operand is conditionally written, we have to check that first.
; ??? If two (or more) operands are written based on the same condition,
; all the tests can be collapsed together.  Not sure that's a big
; enough win yet.
"  if (written & (1ULL << ""))\n""    {\n""    ""    }\n"; Return <c-expr> object to get the value of an operand.
; ESTATE is the current rtl evaluator state.
; If INDEX is non-#f use it, otherwise use (op:index self).
; This special handling of #f for INDEX is *only* supported for operands
; in cxmake-get, gen-set-quiet, and gen-set-trace.
; Ditto for SELECTOR.
""""""", ""_memory""<operand> cxmake-get self="" mode="" index="" selector=""\n""lookahead ("", tick, ""buf.""_writes, "")"; Utilities to implement gen-set-quiet/gen-set-trace.
"  {\n""    "" opval = "";\n""    written |= (1ULL << "");\n"""; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
; For each insn record array of operand numbers [or indices into
; operand instance table].
; Could just scan the operand table for the operand or hardware number,
; assuming the operand number is stored in `op'.
"""    if (UNLIKELY(current_cpu->trace_result_p))\n""      current_cpu->trace_stream << "" << '['"" << "; print memory addresses in hex
"\"memory\""" \"0x\" << hex << (UDI) """"\"memory\""" << dec"""" << ']'"""" << \":=0x\" << hex << "; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
; from printing byte as plain raw char.
"(SI) ""(USI) """"opval << dec << \"  \";\n"; Dispatch to setter code if appropriate
"    ""opval""opval";else
"opval""  }\n""    ""_memory"""""""", ""  {\n";; delayed write: push it to the appropriate buffer
" opval = "";\n""buf.""_writes [(tick + "") % @prefix@::pipe_sz].push (@prefix@::write<"">(pc, opval""));\n";; else, uh, we should never have been called!
"-op-gen-delayed-set-maybe-trace called on non-delayed operand"; TRACE_RESULT_<MODE> (cpu, abuf, hwnum, opnum, value);
; For each insn record array of operand numbers [or indices into
; operand instance table].
; Could just scan the operand table for the operand or hardware number,
; assuming the operand number is stored in `op'.
"    if (UNLIKELY(current_cpu->trace_result_p))\n""      current_cpu->trace_stream << "" << '['"" << "; print memory addresses in hex
"\"memory\""" \"0x\" << hex << (UDI) """"\"memory\""" << dec"""" << ']'"""" << \":=0x\" << hex << ";; Add (SI) or (USI) cast for byte-wide data, to prevent C++ iostreams
;; from printing byte as plain raw char.
"(SI) ""(USI) """"opval << dec << \"  \";\n""  }\n";; else no tracing is emitted
""; Return C code to set the value of an operand.
; NEWVAL is a <c-expr> object of the value to store.
; If INDEX is non-#f use it, otherwise use (op:index self).
; This special handling of #f for INDEX is *only* supported for operands
; in cxmake-get, gen-set-quiet, and gen-set-trace.
; Ditto for SELECTOR.
; Return C code to set the value of an operand and print TRACE_RESULT message.
; NEWVAL is a <c-expr> object of the value to store.
; If INDEX is non-#f use it, otherwise use (op:index self).
; This special handling of #f for INDEX is *only* supported for operands
; in cxmake-get, gen-set-quiet, and gen-set-trace.
; Ditto for SELECTOR.
; Operand profiling and parallel execution support.
; Return boolean indicating if operand OP needs its index saved
; (for parallel write post-processing support).
; Return C code to record profile data for modeling use.
; In the case of a register, this is usually the register's number.
; This shouldn't be called in the case of a scalar, the code should be
; smart enough to know there is no need.
"c++"; Return C code to record the data needed for profiling operand SELF.
; This is done during extraction.
"""      ""out_""in_"" = "";\n"; Return C code to track profiling of operand SELF.
; This is usually called by the x-after handler.
"  ""@prefix@_model_mark_""set_""get_""_"" (current_cpu"""", ""out_""in_"");\n"; CPU, mach, model support.
; Return the declaration of the cpu/insn enum.
"@prefix@_insn_type""instructions in cpu family @prefix@""@PREFIX@_INSN_"; Return the enum of INSN in cpu family CPU.
; In addition to CGEN_INSN_TYPE, an enum is created for each insn in each
; cpu family.  This collapses the insn enum space for each cpu to increase
; cache efficiently (since the IDESC table is similarily collapsed).
"@PREFIX@_INSN_"; Return C code to declare the machine data.
"extern const MACH ""_mach;\n""\n"; Return C code to define the machine data.
"const MACH *sim_machs[] =\n{\n""#ifdef ""\n""  & ""_mach,\n""#endif\n""  0\n""};\n\n"; Return C declarations of cpu model support stuff.
; ??? This goes in arch.h but a better place is each cpu.h.
"model types""MODEL_""#define MAX_MODELS ((int) MODEL_MAX)\n\n"; Function units.
""; Lookup operand named OP-NAME in INSN.
; Returns #f if OP-NAME is not an operand of INSN.
; IN-OUT is 'in to request an input operand, 'out to request an output operand,
; and 'in-out to request either (though if an operand is used for input and
; output then the input version is returned).
; FIXME: Move elsewhere.
"insn-op-lookup: bad arg:"; Return C code to profile a unit's usage.
; UNIT-NUM is number of the unit in INSN.
; OVERRIDES is a list of (name value) pairs, where
; - NAME is a spec name, one of cycles, pred, in, out.
;   The only ones we're concerned with are in,out.  They map operand names
;   as they appear in the semantic code to operand names as they appear in
;   the function unit spec.
; - VALUE is the operand to NAME.  For in,out it is (NAME VALUE) where
;   - NAME is the name of an input/output arg of the unit.
;   - VALUE is the name of the operand as it appears in semantic code.
;
; ??? This is a big sucker, though half of it is just the definitions
; of utility fns.
"  'gen-profile-code\n"; Return C code to initialize UNIT-REFERENCED-VAR to be a bit mask
; of operands of UNIT that were read/written by INSN.
; INSN-REFERENCED-VAR is a bitmask of operands read/written by INSN.
; All we have to do is map INSN-REFERENCED-VAR to
; UNIT-REFERENCED-VAR.
; ??? For now we assume all input operands are read.
"    gen-ref-arg\n""insn_referenced""referenced""    ""if ("" & (1 << "")) "" |= 1 << "";\n""    "" |= 1 << "";\n"""; Initialize unit argument ARG.
; OUT? is #f for input args, #t for output args.
"    gen-arg-unit\n"; Ignore scalars.
; Ignore remapped arg, handled elsewhere.
; Ignore operands not in INSN.
"""    ""out_""in_"" = ""out_""in_"";\n"; Return C code to declare variable to hold unit argument ARG.
; OUT? is #f for input args, #t for output args.
"    gen-arg-decl ""\n"; ignore scalars
"""    "" ""out_""in_"" = ""0"";\n"; Return C code to pass unit argument ARG to the handler.
; OUT? is #f for input args, #t for output args.
"    gen-arg-arg\n"; ignore scalars
""", ""out_""in_""  {\n""    int referenced = 0;\n""    unsigned long long insn_referenced = abuf->written;\n"""; Declare variables to hold unit arguments.
; Initialize 'em, being careful not to initialize an operand that
; has an override.
; Make a list of names of in/out overrides.
"""""""""    in_"" = ""in_"";\n""""    out_"" = ""out_"";\n""""insn function unit spec""invalid spec"; Create bitmask indicating which args were referenced.
""; Emit the call to the handler.
"    "" += "" (current_cpu, idesc"", "", referenced"""");\n""  }\n"; Return C code to profile an insn-specific unit's usage.
; UNIT-NUM is number of the unit in INSN.
; Mode support.
; Generate a table of mode data.
; For now all we need is the names.
"const char *mode_names[] = {\n""  \"""\",\n"; We don't treat aliases as being different from the real
; mode here, so ignore them.
"};\n\n"; Insn profiling support.
; Generate declarations for local variables needed for modelling code.
;   (let ((cti? (or (has-attr? self 'UNCOND-CTI)
;		   (has-attr? self 'COND-CTI))))
;     (string-append
;      (if cti? "  int UNUSED taken_p = 0;\n" "")
;      ))
""; Generate C code to profile INSN.
; Instruction support.
; Return list of all instructions to use for scache engine.
; This is all real insns plus the `invalid' and `cond' virtual insns.
; It does not include the pbb virtual insns.
; Return list of all instructions to use for pbb engine.
; This is all real insns plus the `invalid' and `cond' virtual insns.
;; Subroutine of -create-virtual-insns!.
;; Add virtual insn INSN to the database.
;; We put virtual insns ahead of normal insns because they're kind of special,
;; and it helps to see them first in lists.
;; ORDINAL is a used to place the insn ahead of normal insns;
;; it is a pair so we can do the update for the next virtual insn here.
; Create the virtual insns.
"virtual insns";; Record as a pair so -virtual-insn-add! can update it.
"invalid insn handler""--invalid--""\
  {
    current_cpu->invalid_insn (pc);
    assert (0);
    /* NOTREACHED */
  }
""pbb begin handler""--begin--""\
  {
    vpc = current_cpu->@prefix@_pbb_begin (current_cpu->h_pc_get ());
  }
""pbb chain handler""--chain--""\
  {
    vpc = current_cpu->@prefix@_engine.pbb_chain (current_cpu, abuf);
    // If we don't have to give up control, don't.
    // Note that we may overrun step_insn_count since we do the test at the
    // end of the block.  This is defined to be ok.
    if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
      BREAK (vpc);
  }
""pbb cti-chain handler""--cti-chain--""\
  {
    vpc = current_cpu->@prefix@_engine.pbb_cti_chain (current_cpu, abuf, pbb_br_status, pbb_br_npc);
    // If we don't have to give up control, don't.
    // Note that we may overrun step_insn_count since we do the test at the
    // end of the block.  This is defined to be ok.
    if (UNLIKELY(current_cpu->stop_after_insns_p (abuf->fields.chain.insn_count)))
      BREAK (vpc);
  }
""pbb before handler""--before--""\
  {
    current_cpu->@prefix@_engine.pbb_before (current_cpu, abuf);
  }
""pbb after handler""--after--""\
  {
    current_cpu->@prefix@_engine.pbb_after (current_cpu, abuf);
  }
"; If entire instruction set is conditionally executed, create a virtual
; insn to handle that.
"conditional exec test""--cond--""\
  {
    // Assume branch not taken.
    pbb_br_status = BRANCH_UNTAKEN;
    UINT cond_code = abuf->cond;
    BI exec_p = ""cond_code"";
    if (! exec_p)
      ++vpc;
  }
"; Return a boolean indicating if INSN should be split.
; Subroutine of -decode-split-insn-1.
; Build the ifield-assertion for ifield F-NAME.
; VALUE is either a number or a non-empty list of numbers.
; Subroutine of -decode-split-insn.
; Specialize INSN according to <decode-split> dspec.
; Split INSN.
; The result is a list of the split copies of INSN.
"Splitting "" ...\n"; FIXME: check constraint
; At each iteration, split the result of the previous.
; Create copies of insns to be split.
; ??? better phrase needed?  Possible confusion with gcc's define-split.
; The original insns are then marked as aliases so the simulator ignores them.
"Splitting instructions ...\n";; Splice new insns next to original.
;; Keeps things tidy and generated code
;; easier to read for human viewer.
;; This is done by using an ordinal of
;; (major . minor).
"Done splitting.\n"; .cpu file loading support
; Only run sim-analyze-insns! once.
; List of computed sformat argument buffers.
; Called before the .cpu file has been read in.
; Called after the .cpu file has been read in.
; Specify FUN-GET/SET in the .sim file to cause all hardware references to
; go through methods, thus allowing the programmer to override them.
"read hardware elements via cover functions/methods""write hardware elements via cover functions/methods"; If there is a .sim file, load it.
"/cpu/"".sim""Loading sim file "" ...\n"; If we're building files for an isa, create the virtual insns.
; Called after file is read in and global error checks are done
; to initialize tables.
; Scan insns, copying them to the simulator insn list, splitting the
; requested insns, then analyze the semantics and compute instruction formats.
; 'twould be nice to do this in sim-analyze! but it doesn't know whether this
; needs to be done or not (which is determined by what files are being
; generated).  Since this is an expensive operation, we defer doing this
; to the files that need it.
; This can only be done if one isa and one cpu family is being kept.
; don't include aliases
; do analyze the semantics
; Compute the set of sformat argument buffers.
; Do our own error checking.
 

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