OpenCores
URL https://opencores.org/ocsvn/scarts/scarts/trunk

Subversion Repositories scarts

[/] [scarts/] [trunk/] [toolchain/] [scarts-binutils/] [binutils-2.19.1/] [cgen/] [sim-arch.scm] - Rev 6

Compare with Previous | Blame | View Log

; Simulator generator support routines.
; Copyright (C) 2000, 2009 Red Hat, Inc.
; This file is part of CGEN.
; Utilities of cgen-arch.h.
; Return C macro definitions of the various supported cpus.
""; nothing yet
; Return C declarations of misc. support stuff.
; ??? Modes are now defined in sim/common/cgen-types.h but we will need
; target specific modes.
;   (gen-enum-decl 'mode_type "mode types"
;		  "MODE_"
;		  ; Aliases are not distinct from their real mode so ignore
;		  ; them here.
;		  (append (map list (map obj:name
;					 (mode-list-non-alias-values)))
;			  '((max))))
;   "#define MAX_MODES ((int) MODE_MAX)\n\n"
; Utilities of cgen-cpuall.h.
; Subroutine of -gen-cpuall-includes.
"#include \""".h\"\n"; Return C code to include all the relevant headers for each cpu family,
; conditioned on ifdef WANT_CPU_@CPU@.
"/* Include files for each cpu family.  */\n\n""#ifdef WANT_CPU_""\n""eng""#include \"cgen-engine.h\"\n""cpu"; FIXME: Shorten "decode" to "dec".
"decode""#endif\n\n"; Subroutine of -gen-cpuall-decls to generate cpu-specific structure entries.
; The result is "struct <cpu>_<type-name> <member-name>;".
; INDENT is the amount to indent by.
; CPU is the cpu object.
"#ifdef WANT_CPU_""\n""struct ""_"" "";\n""#endif\n"; Return C declarations of cpu-specific structs.
; These are defined here to achieve a simple and moderately type-safe
; inheritance.  In the non-cpu-specific files, these structs consist of
; just the baseclass.  In cpu-specific files, the baseclass is augmented
; with the cpu-specific data.
; Top level generators for non-cpu-specific files.
; Generate arch.h
; This file defines non cpu family specific data about the architecture
; and also data structures that combine all variants (e.g. cpu struct).
; It is intended to be included before sim-basics.h and sim-base.h.
"Generating ""'s arch.h ...\n""Simulator header for @arch@.""#ifndef @ARCH@_ARCH_H\n""#define @ARCH@_ARCH_H\n""\n""#define TARGET_BIG_ENDIAN 1\n\n"; FIXME
;(gen-mem-macros)
;"/* FIXME: split into 32/64 parts */\n"
;"#define WI SI\n"
;"#define UWI USI\n"
;"#define AI USI\n\n"
"#endif /* @ARCH@_ARCH_H */\n"; Generate arch.c
; This file defines non cpu family specific data about the architecture.
"Generating ""'s arch.c ...\n""Simulator support for @arch@.""\
#include \"sim-main.h\"
#include \"bfd.h\"
 
"; Generate cpuall.h
; This file pulls together all of the cpu variants .h's.
; It is intended to be included after sim-base.h/cgen-sim.h.
"Generating ""'s cpuall.h ...\n""Simulator CPU header for @arch@.""#ifndef @ARCH@_CPUALL_H\n""#define @ARCH@_CPUALL_H\n""\n""#endif /* @ARCH@_CPUALL_H */\n"; Generate ops.c
; No longer used.
"Generating ""'s ops.c ...\n""Simulator operational support for @arch@.""\
#define MEMOPS_DEFINE_INLINE
 
#include \"config.h\"
#include <signal.h>
#include \"ansidecl.h\"
#include \"bfd.h\"
#include \"tconfig.h\"
#include \"cgen-sim.h\"
#include \"memops.h\"
 
/* FIXME: wip */
int pow2masks[] = {
  0, 0, 1, -1, 3, -1, -1, -1, 7, -1, -1, -1, -1, -1, -1, -1, 15
};
 
"

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2025 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.