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[/] [scarts/] [trunk/] [toolchain/] [scarts-gdb/] [gdb-6.8/] [sim/] [testsuite/] [sim/] [frv/] [nfdsads.cgs] - Rev 26
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# frv testcase for nfdsads $FRi,$FRj,$FRk# mach: fr500 fr550 frv.include "testutils.inc"float_constantsstartload_float_constantsload_float_constants1.global nfdsadsnfdsads:nfdsads fr16,fr0,fr2test_fr_fr fr2,fr0test_fr_fr fr3,fr52test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr4,fr2test_fr_fr fr2,fr4test_fr_fr fr3,fr48test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr8,fr2test_fr_fr fr2,fr8test_fr_fr fr3,fr28test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr12,fr2test_fr_fr fr2,fr12test_fr_fr fr3,fr24test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr16,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr20,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr24,fr2test_fr_fr fr2,fr24test_fr_fr fr3,fr12test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr28,fr2test_fr_fr fr2,fr28test_fr_fr fr3,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr32,fr2test_fr_fr fr2,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr36,fr2test_fr_fr fr2,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr40,fr2test_fr_fr fr2,fr40test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr44,fr2test_fr_fr fr2,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr48,fr2test_fr_fr fr2,fr48test_fr_fr fr3,fr4test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr16,fr52,fr2test_fr_fr fr2,fr52test_fr_fr fr3,fr0test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr0,fr2test_fr_fr fr2,fr0test_fr_fr fr3,fr52test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr4,fr2test_fr_fr fr2,fr4test_fr_fr fr3,fr48test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr8,fr2test_fr_fr fr2,fr8test_fr_fr fr3,fr28test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr12,fr2test_fr_fr fr2,fr12test_fr_fr fr3,fr24test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr16,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr20,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr16test_fr_fr fr3,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr24,fr2test_fr_fr fr2,fr24test_fr_fr fr3,fr12test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr28,fr2test_fr_fr fr2,fr28test_fr_fr fr3,fr8test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr32,fr2test_fr_fr fr2,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr36,fr2test_fr_fr fr2,fr36test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr40,fr2test_fr_fr fr2,fr40test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr44,fr2test_fr_fr fr2,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr48,fr2test_fr_fr fr2,fr48test_fr_fr fr3,fr4test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr20,fr52,fr2test_fr_fr fr2,fr52test_fr_fr fr3,fr0test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr8,fr28,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr12,fr24,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr24,fr12,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr28,fr8,fr2test_fr_fr fr2,fr16test_fr_fr fr2,fr20test_fr_fr fr3,fr32test_fr_fr fr3,fr32test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr36,fr40,fr2test_fr_fr fr2,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0; try to cause exceptionsset_fr_fr fr4,fr49nfdsads fr48,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0set_fr_fr fr0,fr53nfdsads fr52,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr56,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0,fner1test_spr_immed 0,fner0nfdsads fr60,fr28,fr2; test_fr_fr fr2,fr44; test_fr_fr fr3,fr44test_spr_immed 0xc,fner1test_spr_immed 0,fner0pass