Subversion Repositories sd_card_controller

Wishbone SD Card Controller IP Core
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The Wishbone SD Card Controller IP Core is MMC/SD communication controller designed to be
used in a System-on-Chip. IP core provides simple interface for any CPU with Wishbone
bus. The communication between the MMC/SD card controller and MMC/SD card is performed
according to the MMC/SD protocol.

Features
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The MMC/SD card controller provides following features:

- 1- or 4-bit MMC/SD mode (does not support SPI mode),
- 32-bit Wishbone interface,
- DMA engine for data transfers,
- Interrupt generation on completion of data and command transactions,
- Configurable data transfer block size,
- Support for any command code (including multiple data block tranfser),
- Support for R1, R1b, R2(136-bit), R3, R6 and R7 responses.

Documentation
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The documentation is located in the doc/ directory.

Examples
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A sample ORPSoC project that make use of this core is located at:

https://github.com/mczerski/orpsoc-de0_nano

The project is based on de0_nano board with custom made expansion board
with SD Card connector.

There is also u-boot project port for this board located at:

https://github.com/mczerski/u-boot

This u-boot project contains driver for Wishbone SD Card Controller IP Core
and can be configured for de0_nano board (with custom made expansion board).