OpenCores
URL https://opencores.org/ocsvn/sgmii/sgmii/trunk

Subversion Repositories sgmii

[/] [sgmii/] [trunk/] [build/] [OpenCore_MAC/] [TECH/] [altera/] [DDR_O_CLK.bsf] - Rev 26

Compare with Previous | Blame | View Log

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2009 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files from any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
        (rect 0 0 232 120)
        (text "DDR_O_CLK" (rect 78 1 167 17)(font "Arial" (font_size 10)))
        (text "inst" (rect 8 104 25 116)(font "Arial" ))
        (port
                (pt 0 24)
                (input)
                (text "datain_h" (rect 0 0 48 14)(font "Arial" (font_size 8)))
                (text "datain_h" (rect 4 11 46 24)(font "Arial" (font_size 8)))
                (line (pt 0 24)(pt 88 24)(line_width 1))
        )
        (port
                (pt 0 40)
                (input)
                (text "datain_l" (rect 0 0 43 14)(font "Arial" (font_size 8)))
                (text "datain_l" (rect 4 27 43 40)(font "Arial" (font_size 8)))
                (line (pt 0 40)(pt 88 40)(line_width 1))
        )
        (port
                (pt 0 56)
                (input)
                (text "outclock" (rect 0 0 47 14)(font "Arial" (font_size 8)))
                (text "outclock" (rect 4 43 42 56)(font "Arial" (font_size 8)))
                (line (pt 0 56)(pt 88 56)(line_width 1))
        )
        (port
                (pt 232 24)
                (output)
                (text "dataout" (rect 0 0 42 14)(font "Arial" (font_size 8)))
                (text "dataout" (rect 193 11 229 24)(font "Arial" (font_size 8)))
                (line (pt 232 24)(pt 152 24)(line_width 1))
        )
        (drawing
                (text "ddio" (rect 110 27 131 40)(font "Arial" (font_size 8)))
                (text "output" (rect 105 42 135 55)(font "Arial" (font_size 8)))
                (text "power up" (rect 92 74 129 86)(font "Arial" ))
                (text "low" (rect 92 84 105 96)(font "Arial" ))
                (line (pt 88 16)(pt 152 16)(line_width 1))
                (line (pt 152 16)(pt 152 96)(line_width 1))
                (line (pt 152 96)(pt 88 96)(line_width 1))
                (line (pt 88 96)(pt 88 16)(line_width 1))
        )
)

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.