Subversion Repositories simple_fm_receiver

$Id: README,v 1.2 2005-03-04 08:03:10 arif_endro Exp $

Do not edit files in directory `export' directly but change the HDL
source in `source' directory then use ALLIANCE tools to analyze, export
and sintesis them.

There are more than one test bench, the first (e.g modelsim-bench) is
for quick test e.g just hit `run -all' then this will test in one loop,
other can be used for modifying clock signal or applying reset signal to
fm so custom input response can be analyze.

directory layout:
        
        source => contain source code development (primary source)
        export => contain VHDL and VERILOG exportable code that can
                  be synthesized on many synthesizer tools.
        docs   => contains documentation on FM Receiver
        bench  => the test bench clock and reset can be modified

NOTES: 

The documentation is better displayed on postscript format than in pdf
format this may be because the dvipdf driver not produces good pdf file.
if you have ghostview or any postscript viewer see the postscript file
to get the best view.


Arif E. Nugroho
arif_endro@yahoo.com