Subversion Repositories single-14-segment-display-driver-w-decoder

// Verilog netlist produced by program LSE :  version Diamond (64-bit) 3.8.0.115.3
// Netlist written on Sun Jan 08 00:20:00 2017
//
// Verilog Description of module DisplayDriverWrapper
//
 
module DisplayDriverWrapper (clk, reset, button, disp_data, disp_sel);   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(15[8:28])
    input clk;   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(17[9:12])
    input reset;   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(18[9:14])
    input button;   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(20[9:15])
    output [13:0]disp_data;   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    output disp_sel;   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(29[9:17])
 
 
    wire GND_net, VCC_net;
 
    VHI i12 (.Z(VCC_net));
    OB disp_data_pad_11 (.I(GND_net), .O(disp_data[11]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_13 (.I(GND_net), .O(disp_data[13]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_12 (.I(GND_net), .O(disp_data[12]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_10 (.I(GND_net), .O(disp_data[10]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_9 (.I(GND_net), .O(disp_data[9]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_8 (.I(GND_net), .O(disp_data[8]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_7 (.I(GND_net), .O(disp_data[7]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_6 (.I(GND_net), .O(disp_data[6]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_5 (.I(GND_net), .O(disp_data[5]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_4 (.I(GND_net), .O(disp_data[4]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_3 (.I(GND_net), .O(disp_data[3]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_2 (.I(GND_net), .O(disp_data[2]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_1 (.I(GND_net), .O(disp_data[1]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_data_pad_0 (.I(GND_net), .O(disp_data[0]));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(24[9:18])
    OB disp_sel_pad (.I(GND_net), .O(disp_sel));   // c:/projects/single-14-segment-display-driver-w-decoder/project/sources/displaydriverwrapper.vhd(29[9:17])
    GSR GSR_INST (.GSR(VCC_net));
    VLO i1 (.Z(GND_net));
    PUR PUR_INST (.PUR(VCC_net));
    defparam PUR_INST.RST_PULSE = 1;
 
endmodule
//
// Verilog Description of module PUR
// module not written out since it is a black-box. 
//