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URL https://opencores.org/ocsvn/single-14-segment-display-driver-w-decoder/single-14-segment-display-driver-w-decoder/trunk

Subversion Repositories single-14-segment-display-driver-w-decoder

[/] [single-14-segment-display-driver-w-decoder/] [trunk/] [Project/] [Lattice_FPGA_Build/] [impl1/] [impl1_scck.rpt] - Rev 9

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# Synopsys Constraint Checker(syntax only), version maplat, Build 1498R, built Jul  5 2016
# Copyright (C) 1994-2016 Synopsys, Inc. All rights reserved. This Synopsys software and all associated documentation are proprietary to Synopsys, Inc. and may only be used pursuant to the terms and conditions of a written license agreement with Synopsys, Inc. All other use, reproduction, modification, or distribution of the Synopsys software or the associated documentation is strictly prohibited.

# Written on Tue Jan 17 23:41:22 2017


##### DESIGN INFO #######################################################

Top View:                "DisplayDriverWrapper"
Constraint File(s):      (none)

#Run constraint checker to find more issues with constraints.
#########################################################################



No issues found in constraint syntax.



Clock Summary
*************

Start                                             Requested     Requested     Clock                                       Clock                     Clock
Clock                                             Frequency     Period        Type                                        Group                     Load 
---------------------------------------------------------------------------------------------------------------------------------------------------------
DisplayDriverWrapper|bttn_state_derived_clock     1.0 MHz       1000.000      derived (from DisplayDriverWrapper|clk)     Autoconstr_clkgroup_0     8    
DisplayDriverWrapper|clk                          1.0 MHz       1000.000      inferred                                    Autoconstr_clkgroup_0     5    
=========================================================================================================================================================

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