Subversion Repositories socgen

<?xml version="1.0" encoding="UTF-8"?>
<!--           
//                                                                                                    //
// Generated File Do Not EDIT                                                                         //
//                                                                                                    //
// ./tools/verilog/gen_tb -vendor opencores.org -library Mos6502  -component cpu  -version def //
//                                                                                                    //
-->           
<spirit:design
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">
<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>Mos6502</spirit:library>
<spirit:name>cpu</spirit:name>
<spirit:version>def_duth.design</spirit:version>
<spirit:adHocConnections>

<spirit:adHocConnection>
<spirit:name>addr</spirit:name>
<spirit:externalPortReference spirit:portRef="addr" spirit:left="CPU_ADD-1" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="addr" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>alu_status</spirit:name>
<spirit:externalPortReference spirit:portRef="alu_status" spirit:left="7" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="alu_status" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>clk</spirit:name>
<spirit:externalPortReference  spirit:portRef="clk" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="clk" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>enable</spirit:name>
<spirit:externalPortReference  spirit:portRef="enable" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="enable" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>nmi</spirit:name>
<spirit:externalPortReference  spirit:portRef="nmi" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="nmi" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>pg0_add</spirit:name>
<spirit:externalPortReference spirit:portRef="pg0_add" spirit:left="7" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="pg0_add" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>pg0_data</spirit:name>
<spirit:externalPortReference spirit:portRef="pg0_data" spirit:left="7" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="pg0_data" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>pg0_rd</spirit:name>
<spirit:externalPortReference  spirit:portRef="pg0_rd" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="pg0_rd" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>pg0_wr</spirit:name>
<spirit:externalPortReference  spirit:portRef="pg0_wr" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="pg0_wr" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>rd</spirit:name>
<spirit:externalPortReference  spirit:portRef="rd" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="rd" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>rdata</spirit:name>
<spirit:externalPortReference spirit:portRef="rdata" spirit:left="15" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="rdata" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>reset</spirit:name>
<spirit:externalPortReference  spirit:portRef="reset" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="reset" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>vec_int</spirit:name>
<spirit:externalPortReference spirit:portRef="vec_int" spirit:left="7" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="vec_int" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>wdata</spirit:name>
<spirit:externalPortReference spirit:portRef="wdata" spirit:left="7" spirit:right="0" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="wdata" />
</spirit:adHocConnection>

<spirit:adHocConnection>
<spirit:name>wr</spirit:name>
<spirit:externalPortReference  spirit:portRef="wr" />
<spirit:internalPortReference  spirit:componentRef="dut" spirit:portRef="wr" />
</spirit:adHocConnection>


</spirit:adHocConnections>
<spirit:componentInstances>

<spirit:componentInstance>
<spirit:instanceName>dut</spirit:instanceName>
<spirit:componentRef spirit:vendor="opencores.org" spirit:library="Mos6502" spirit:name="cpu" spirit:version="def" />
<spirit:configurableElementValues>
 <spirit:configurableElementValue spirit:referenceId="BOOT_VEC">BOOT_VEC</spirit:configurableElementValue>
 <spirit:configurableElementValue spirit:referenceId="CPU_ADD">CPU_ADD</spirit:configurableElementValue>
 <spirit:configurableElementValue spirit:referenceId="PROG_ROM_ADD">PROG_ROM_ADD</spirit:configurableElementValue>
 <spirit:configurableElementValue spirit:referenceId="PROG_ROM_WORDS">PROG_ROM_WORDS</spirit:configurableElementValue>
 <spirit:configurableElementValue spirit:referenceId="VEC_TABLE">VEC_TABLE</spirit:configurableElementValue>
</spirit:configurableElementValues>
</spirit:componentInstance>
</spirit:componentInstances>
</spirit:design>