OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [sim/] [icarus/] [io_irq_2/] [wave.sav] - Rev 133

Compare with Previous | Blame | View Log

[*]
[*] GTKWave Analyzer v3.3.62 (w)1999-2014 BSI
[*] Tue Apr 14 16:52:12 2015
[*]
[dumpfile] "/home/johne/Desktop/socgen/work/opencores.org__fpgas/ip/Nexys2_T6502/sim/icarus/io_irq_2/TestBench.vcd"
[dumpfile_mtime] "Tue Apr 14 16:27:54 2015"
[dumpfile_size] 38324599
[savefile] "/home/johne/Desktop/socgen/Projects/opencores.org/fpgas/ip/Nexys2_T6502/sim/icarus/io_irq_2/wave.sav"
[timestart] 100500000
[size] 1613 999
[pos] 49 0
*-26.000000 265000000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] TB.
[treeopen] TB.test.
[treeopen] TB.test.dut.
[treeopen] TB.test.dut.core.
[treeopen] TB.test.dut.core.T6502.
[treeopen] TB.test.dut.core.T6502.adv_dbg.
[treeopen] TB.test.dut.core.T6502.cpu.
[treeopen] TB.test.dut.jtag_tap.
[treeopen] TB.test.jtag_model.
[sst_width] 385
[signals_width] 214
[sst_expanded] 1
[sst_vpaned_height] 562
@28
TB.test.cg.clk
TB.test.cg.reset
TB.test.TXD
TB.test.RXD
TB.test.JTAG_TCK
TB.test.JTAG_TDI
TB.test.JTAG_TDO
TB.test.JTAG_TMS
TB.test.JTAG_TRESET_N
@22
TB.test.LED[7:0]
TB.test.SW[7:0]
TB.test.dut.jtag_tap.instruction[3:0]
@820
TB.test.dut.jtag_tap.inst_string[127:0]
@28
TB.test.jtag_model.actual
@22
TB.test.jtag_model.tclk_counter[3:0]
TB.test.jtag_model.LoadTapInst.Ack[4:1]
TB.test.jtag_model.LoadTapInst.Inst[4:1]
TB.test.jtag_model.LoadTapInst.i[31:0]
TB.test.dut.jtag_tap.instruction_buffer[3:0]
@28
TB.test.dut.jtag_tap.trst_n_pad_in
TB.test.dut.jtag_tap.tdi_pad_in
TB.test.dut.jtag_tap.tclk_pad_in
TB.test.dut.jtag_tap.test_logic_reset_o
TB.test.dut.core.T6502.adv_dbg.debug_select_i
@22
TB.test.dut.core.T6502.adv_dbg.input_shift_reg[52:0]
TB.test.dut.core.T6502.adv_dbg.module_selects[3:0]
@28
TB.test.dut.core.T6502.adv_dbg.select_cmd
TB.test.dut.core.T6502.adv_dbg.rst_i
TB.test.dut.core.T6502.adv_dbg.shift_dr_i
TB.test.dut.core.T6502.adv_dbg.tck_i
TB.test.dut.core.T6502.adv_dbg.tdi_i
TB.test.dut.core.T6502.adv_dbg.tdo_jsp
TB.test.dut.core.T6502.adv_dbg.update_dr_i
TB.test.dut.core.T6502.adv_dbg.wb_clk_i
@22
TB.test.dut.core.T6502.adv_dbg.wb_jsp_dat_i[7:0]
@28
TB.test.dut.core.T6502.adv_dbg.wb_jsp_stb_i
@22
TB.test.dut.core.T6502.adv_dbg.jsp_data_out[7:0]
TB.test.dut.core.sw_pad_in[7:0]
TB.test.dut.core.led_pad_out[7:0]
@28
TB.test.dut.jtag_tap.aux_tdo_i
TB.test.dut.jtag_tap.aux_select_o
@22
TB.test.display_model.segment0[3:0]
TB.test.display_model.segment1[3:0]
TB.test.display_model.segment2[3:0]
TB.test.display_model.segment3[3:0]
TB.test.dut.core.T6502.cpu.vec_int[7:0]
@29
TB.test.dut.core.T6502.cpu.nmi
[pattern_trace] 1
[pattern_trace] 0

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.