URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [fpgas/] [ip/] [Nexys2_T6502/] [sim/] [testbenches/] [verilog/] [tb.ext] - Rev 134
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assign A_CLK = clk;
assign CTS = reset;
pullup pu_ramwait ( RAMWAIT );
pullup pu_memdb_0 ( MEMDB[0] );
pullup pu_memdb_1 ( MEMDB[1] );
pullup pu_memdb_2 ( MEMDB[2] );
pullup pu_memdb_3 ( MEMDB[3] );
pullup pu_memdb_4 ( MEMDB[4] );
pullup pu_memdb_5 ( MEMDB[5] );
pullup pu_memdb_6 ( MEMDB[6] );
pullup pu_memdb_7 ( MEMDB[7] );
pullup pu_memdb_8 ( MEMDB[8] );
pullup pu_memdb_9 ( MEMDB[9] );
pullup pu_memdb_10 ( MEMDB[10] );
pullup pu_memdb_11 ( MEMDB[11] );
pullup pu_memdb_12 ( MEMDB[12] );
pullup pu_memdb_13 ( MEMDB[13] );
pullup pu_memdb_14 ( MEMDB[14] );
pullup pu_memdb_15 ( MEMDB[15] );
pullup pu_flashststs ( FLASHSTSTS );
pullup pu_jtag ( JTAG_TDO );
pullup pu_jtag ( PS2C );
pullup pu_jtag ( PS2D );
reg [7:0] SW_reg;
reg [3:0] BTN_reg;
initial
begin
SW_reg = 8'h00;
BTN_reg = 4'h0;
end
assign SW = SW_reg;
assign BTN = BTN_reg;
assign STOP = 1'b0;
assign BAD = 1'b0;
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