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https://opencores.org/ocsvn/socgen/socgen/trunk
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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [doc/] [sch/] [io_gpio_def.sch] - Rev 135
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v 20100214 1
C 1600 300 1 0 0 in_port_vector.sym
{
T 1600 300 5 10 1 1 0 6 1 1
refdes=wdata[7:0]
}
C 1600 700 1 0 0 in_port_vector.sym
{
T 1600 700 5 10 1 1 0 6 1 1
refdes=gpio_1_in[7:0]
}
C 1600 1100 1 0 0 in_port_vector.sym
{
T 1600 1100 5 10 1 1 0 6 1 1
refdes=gpio_0_in[7:0]
}
C 1600 1500 1 0 0 in_port_vector.sym
{
T 1600 1500 5 10 1 1 0 6 1 1
refdes=addr[3:0]
}
C 1600 1900 1 0 0 in_port.sym
{
T 1600 1900 5 10 1 1 0 6 1 1
refdes=wr
}
C 1600 2300 1 0 0 in_port.sym
{
T 1600 2300 5 10 1 1 0 6 1 1
refdes=reset
}
C 1600 2700 1 0 0 in_port.sym
{
T 1600 2700 5 10 1 1 0 6 1 1
refdes=rd
}
C 1600 3100 1 0 0 in_port.sym
{
T 1600 3100 5 10 1 1 0 6 1 1
refdes=enable
}
C 1600 3500 1 0 0 in_port.sym
{
T 1600 3500 5 10 1 1 0 6 1 1
refdes=cs
}
C 1600 3900 1 0 0 in_port.sym
{
T 1600 3900 5 10 1 1 0 6 1 1
refdes=clk
}
C 4400 300 1 0 0 out_port_vector.sym
{
T 5400 300 5 10 1 1 0 0 1 1
refdes=rdata[7:0]
}
C 4400 700 1 0 0 out_port_vector.sym
{
T 5400 700 5 10 1 1 0 0 1 1
refdes=gpio_1_out[7:0]
}
C 4400 1100 1 0 0 out_port_vector.sym
{
T 5400 1100 5 10 1 1 0 0 1 1
refdes=gpio_1_oe[7:0]
}
C 4400 1500 1 0 0 out_port_vector.sym
{
T 5400 1500 5 10 1 1 0 0 1 1
refdes=gpio_0_out[7:0]
}
C 4400 1900 1 0 0 out_port_vector.sym
{
T 5400 1900 5 10 1 1 0 0 1 1
refdes=gpio_0_oe[7:0]
}