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https://opencores.org/ocsvn/socgen/socgen/trunk
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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [io/] [ip/] [io_module/] [sim/] [testbenches/] [verilog/] [top.ext.mouse] - Rev 131
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assign enable = 1'b1;assign reg_mb_cs = 1'b1;assign cts_pad_in = 1'b0;assign uart_rxd_pad_in = uart_txd_pad_out;assign pic_irq_in = {3'h0,ps2_data_avail,tx_irq,rx_irq,timer_irq};assign STOP = 1'b0;assign BAD = 1'b0;