Subversion Repositories socgen

v 20100214 1
B 300 0  5800 6900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 7050   5 10 1 1 0 0 1 1
device=micro_bus_def
T 400 7250 5 10 1 1 0 0 1 1
refdes=U?
T 400 7400    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 7400    0 10 0 1 0 0 1 1
library=logic
T 400 7400    0 10 0 1 0 0 1 1
component=micro_bus
T 400 7400    0 10 0 1 0 0 1 1
version=def
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=wdata_in[7:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=sh_prog_rom_mem_rdata[15:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1 
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=prog_rom_mem_rdata[15:0]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 10 1 1 
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=mem_wait[1:0]
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 10 1 1 
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=mem_rdata[15:0]
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 10 1 1 
{
T 400 1200 5 10 1 1 0 1 1 1
pinnumber=io_reg_rdata[15:0]
T 400 1200 5 10 0 1 0 1 1 1
pinseq=6
}
P 300 1400 0 1400 10 1 1 
{
T 400 1400 5 10 1 1 0 1 1 1
pinnumber=ext_mem_rdata[15:0]
T 400 1400 5 10 0 1 0 1 1 1
pinseq=7
}
P 300 1600 0 1600 10 1 1 
{
T 400 1600 5 10 1 1 0 1 1 1
pinnumber=data_rdata[15:0]
T 400 1600 5 10 0 1 0 1 1 1
pinseq=8
}
P 300 1800 0 1800 10 1 1 
{
T 400 1800 5 10 1 1 0 1 1 1
pinnumber=addr_in[15:0]
T 400 1800 5 10 0 1 0 1 1 1
pinseq=9
}
P 300 2000 0 2000 4 0 1  
{
T 400 2000 5 10 1 1 0 1 1 1 
pinnumber=wr_in
T 400 2000 5 10 0 1 0 1 1 1 
pinseq=10
}
P 300 2200 0 2200 4 0 1  
{
T 400 2200 5 10 1 1 0 1 1 1 
pinnumber=reset
T 400 2200 5 10 0 1 0 1 1 1 
pinseq=11
}
P 300 2400 0 2400 4 0 1  
{
T 400 2400 5 10 1 1 0 1 1 1 
pinnumber=rd_in
T 400 2400 5 10 0 1 0 1 1 1 
pinseq=12
}
P 300 2600 0 2600 4 0 1  
{
T 400 2600 5 10 1 1 0 1 1 1 
pinnumber=io_reg_wait
T 400 2600 5 10 0 1 0 1 1 1 
pinseq=13
}
P 300 2800 0 2800 4 0 1  
{
T 400 2800 5 10 1 1 0 1 1 1 
pinnumber=ext_mem_wait
T 400 2800 5 10 0 1 0 1 1 1 
pinseq=14
}
P 300 3000 0 3000 4 0 1  
{
T 400 3000 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 3000 5 10 0 1 0 1 1 1 
pinseq=15
}
P 6100 200 6400 200 10 1 1
{
T 6000 200 5  10 1 1 0 7 1 1 
pinnumber=sh_prog_rom_mem_wdata[15:0]
T 6000 200 5  10 0 1 0 7 1 1 
pinseq=16
}
P 6100 400 6400 400 10 1 1
{
T 6000 400 5  10 1 1 0 7 1 1 
pinnumber=sh_prog_rom_mem_addr[11:0]
T 6000 400 5  10 0 1 0 7 1 1 
pinseq=17
}
P 6100 600 6400 600 10 1 1
{
T 6000 600 5  10 1 1 0 7 1 1 
pinnumber=rdata_out[15:0]
T 6000 600 5  10 0 1 0 7 1 1 
pinseq=18
}
P 6100 800 6400 800 10 1 1
{
T 6000 800 5  10 1 1 0 7 1 1 
pinnumber=prog_rom_mem_wdata[15:0]
T 6000 800 5  10 0 1 0 7 1 1 
pinseq=19
}
P 6100 1000 6400 1000 10 1 1
{
T 6000 1000 5  10 1 1 0 7 1 1 
pinnumber=prog_rom_mem_addr[11:0]
T 6000 1000 5  10 0 1 0 7 1 1 
pinseq=20
}
P 6100 1200 6400 1200 10 1 1
{
T 6000 1200 5  10 1 1 0 7 1 1 
pinnumber=mem_wdata[15:0]
T 6000 1200 5  10 0 1 0 7 1 1 
pinseq=21
}
P 6100 1400 6400 1400 10 1 1
{
T 6000 1400 5  10 1 1 0 7 1 1 
pinnumber=mem_addr[15:0]
T 6000 1400 5  10 0 1 0 7 1 1 
pinseq=22
}
P 6100 1600 6400 1600 10 1 1
{
T 6000 1600 5  10 1 1 0 7 1 1 
pinnumber=io_reg_wdata[7:0]
T 6000 1600 5  10 0 1 0 7 1 1 
pinseq=23
}
P 6100 1800 6400 1800 10 1 1
{
T 6000 1800 5  10 1 1 0 7 1 1 
pinnumber=io_reg_addr[7:0]
T 6000 1800 5  10 0 1 0 7 1 1 
pinseq=24
}
P 6100 2000 6400 2000 10 1 1
{
T 6000 2000 5  10 1 1 0 7 1 1 
pinnumber=ext_mem_wdata[15:0]
T 6000 2000 5  10 0 1 0 7 1 1 
pinseq=25
}
P 6100 2200 6400 2200 10 1 1
{
T 6000 2200 5  10 1 1 0 7 1 1 
pinnumber=ext_mem_addr[13:0]
T 6000 2200 5  10 0 1 0 7 1 1 
pinseq=26
}
P 6100 2400 6400 2400 10 1 1
{
T 6000 2400 5  10 1 1 0 7 1 1 
pinnumber=data_wdata[15:0]
T 6000 2400 5  10 0 1 0 7 1 1 
pinseq=27
}
P 6100 2600 6400 2600 10 1 1
{
T 6000 2600 5  10 1 1 0 7 1 1 
pinnumber=data_be[1:0]
T 6000 2600 5  10 0 1 0 7 1 1 
pinseq=28
}
P 6100 2800 6400 2800 10 1 1
{
T 6000 2800 5  10 1 1 0 7 1 1 
pinnumber=data_addr[11:1]
T 6000 2800 5  10 0 1 0 7 1 1 
pinseq=29
}
P 6100 3000 6400 3000 4 0 1
{
T 6000 3000 5  10 1 1 0 7 1 1
pinnumber=sh_prog_rom_mem_wr
T 6100 3000 5  10 0 1 0 7 1 1
pinseq=30
}
P 6100 3200 6400 3200 4 0 1
{
T 6000 3200 5  10 1 1 0 7 1 1
pinnumber=sh_prog_rom_mem_rd
T 6100 3200 5  10 0 1 0 7 1 1
pinseq=31
}
P 6100 3400 6400 3400 4 0 1
{
T 6000 3400 5  10 1 1 0 7 1 1
pinnumber=sh_prog_rom_mem_cs
T 6100 3400 5  10 0 1 0 7 1 1
pinseq=32
}
P 6100 3600 6400 3600 4 0 1
{
T 6000 3600 5  10 1 1 0 7 1 1
pinnumber=prog_rom_mem_wr
T 6100 3600 5  10 0 1 0 7 1 1
pinseq=33
}
P 6100 3800 6400 3800 4 0 1
{
T 6000 3800 5  10 1 1 0 7 1 1
pinnumber=prog_rom_mem_rd
T 6100 3800 5  10 0 1 0 7 1 1
pinseq=34
}
P 6100 4000 6400 4000 4 0 1
{
T 6000 4000 5  10 1 1 0 7 1 1
pinnumber=prog_rom_mem_cs
T 6100 4000 5  10 0 1 0 7 1 1
pinseq=35
}
P 6100 4200 6400 4200 4 0 1
{
T 6000 4200 5  10 1 1 0 7 1 1
pinnumber=mem_wr
T 6100 4200 5  10 0 1 0 7 1 1
pinseq=36
}
P 6100 4400 6400 4400 4 0 1
{
T 6000 4400 5  10 1 1 0 7 1 1
pinnumber=mem_rd
T 6100 4400 5  10 0 1 0 7 1 1
pinseq=37
}
P 6100 4600 6400 4600 4 0 1
{
T 6000 4600 5  10 1 1 0 7 1 1
pinnumber=mem_cs
T 6100 4600 5  10 0 1 0 7 1 1
pinseq=38
}
P 6100 4800 6400 4800 4 0 1
{
T 6000 4800 5  10 1 1 0 7 1 1
pinnumber=io_reg_wr
T 6100 4800 5  10 0 1 0 7 1 1
pinseq=39
}
P 6100 5000 6400 5000 4 0 1
{
T 6000 5000 5  10 1 1 0 7 1 1
pinnumber=io_reg_rd
T 6100 5000 5  10 0 1 0 7 1 1
pinseq=40
}
P 6100 5200 6400 5200 4 0 1
{
T 6000 5200 5  10 1 1 0 7 1 1
pinnumber=io_reg_cs
T 6100 5200 5  10 0 1 0 7 1 1
pinseq=41
}
P 6100 5400 6400 5400 4 0 1
{
T 6000 5400 5  10 1 1 0 7 1 1
pinnumber=ext_mem_wr
T 6100 5400 5  10 0 1 0 7 1 1
pinseq=42
}
P 6100 5600 6400 5600 4 0 1
{
T 6000 5600 5  10 1 1 0 7 1 1
pinnumber=ext_mem_rd
T 6100 5600 5  10 0 1 0 7 1 1
pinseq=43
}
P 6100 5800 6400 5800 4 0 1
{
T 6000 5800 5  10 1 1 0 7 1 1
pinnumber=ext_mem_cs
T 6100 5800 5  10 0 1 0 7 1 1
pinseq=44
}
P 6100 6000 6400 6000 4 0 1
{
T 6000 6000 5  10 1 1 0 7 1 1
pinnumber=enable
T 6100 6000 5  10 0 1 0 7 1 1
pinseq=45
}
P 6100 6200 6400 6200 4 0 1
{
T 6000 6200 5  10 1 1 0 7 1 1
pinnumber=data_wr
T 6100 6200 5  10 0 1 0 7 1 1
pinseq=46
}
P 6100 6400 6400 6400 4 0 1
{
T 6000 6400 5  10 1 1 0 7 1 1
pinnumber=data_rd
T 6100 6400 5  10 0 1 0 7 1 1
pinseq=47
}
P 6100 6600 6400 6600 4 0 1
{
T 6000 6600 5  10 1 1 0 7 1 1
pinnumber=data_cs
T 6100 6600 5  10 0 1 0 7 1 1
pinseq=48
}