Subversion Repositories socgen

v 20100214 1
B 300 0  4300 5700 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 5850   5 10 1 1 0 0 1 1
device=micro_bus_exp5
T 400 6050 5 10 1 1 0 0 1 1
refdes=U?
T 400 6200    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 6200    0 10 0 1 0 0 1 1
library=logic
T 400 6200    0 10 0 1 0 0 1 1
component=micro_bus
T 400 6200    0 10 0 1 0 0 1 1
version=exp5
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=wdata_in[7:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=mas_4_rdata_in[7:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1 
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=mas_3_rdata_in[7:0]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 10 1 1 
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=mas_2_rdata_in[7:0]
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 10 1 1 
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=mas_1_rdata_in[7:0]
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 10 1 1 
{
T 400 1200 5 10 1 1 0 1 1 1
pinnumber=mas_0_rdata_in[7:0]
T 400 1200 5 10 0 1 0 1 1 1
pinseq=6
}
P 300 1400 0 1400 10 1 1 
{
T 400 1400 5 10 1 1 0 1 1 1
pinnumber=addr_in[7:0]
T 400 1400 5 10 0 1 0 1 1 1
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=wr_in
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 300 1800 0 1800 4 0 1  
{
T 400 1800 5 10 1 1 0 1 1 1 
pinnumber=reset
T 400 1800 5 10 0 1 0 1 1 1 
pinseq=9
}
P 300 2000 0 2000 4 0 1  
{
T 400 2000 5 10 1 1 0 1 1 1 
pinnumber=rd_in
T 400 2000 5 10 0 1 0 1 1 1 
pinseq=10
}
P 300 2200 0 2200 4 0 1  
{
T 400 2200 5 10 1 1 0 1 1 1 
pinnumber=enable
T 400 2200 5 10 0 1 0 1 1 1 
pinseq=11
}
P 300 2400 0 2400 4 0 1  
{
T 400 2400 5 10 1 1 0 1 1 1 
pinnumber=cs_in
T 400 2400 5 10 0 1 0 1 1 1 
pinseq=12
}
P 300 2600 0 2600 4 0 1  
{
T 400 2600 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 2600 5 10 0 1 0 1 1 1 
pinseq=13
}
P 4600 200 4900 200 10 1 1
{
T 4500 200 5  10 1 1 0 7 1 1 
pinnumber=rdata_out[15:0]
T 4500 200 5  10 0 1 0 7 1 1 
pinseq=14
}
P 4600 400 4900 400 10 1 1
{
T 4500 400 5  10 1 1 0 7 1 1 
pinnumber=mas_4_wdata_out[7:0]
T 4500 400 5  10 0 1 0 7 1 1 
pinseq=15
}
P 4600 600 4900 600 10 1 1
{
T 4500 600 5  10 1 1 0 7 1 1 
pinnumber=mas_4_addr_out[3:0]
T 4500 600 5  10 0 1 0 7 1 1 
pinseq=16
}
P 4600 800 4900 800 10 1 1
{
T 4500 800 5  10 1 1 0 7 1 1 
pinnumber=mas_3_wdata_out[7:0]
T 4500 800 5  10 0 1 0 7 1 1 
pinseq=17
}
P 4600 1000 4900 1000 10 1 1
{
T 4500 1000 5  10 1 1 0 7 1 1 
pinnumber=mas_3_addr_out[3:0]
T 4500 1000 5  10 0 1 0 7 1 1 
pinseq=18
}
P 4600 1200 4900 1200 10 1 1
{
T 4500 1200 5  10 1 1 0 7 1 1 
pinnumber=mas_2_wdata_out[7:0]
T 4500 1200 5  10 0 1 0 7 1 1 
pinseq=19
}
P 4600 1400 4900 1400 10 1 1
{
T 4500 1400 5  10 1 1 0 7 1 1 
pinnumber=mas_2_addr_out[3:0]
T 4500 1400 5  10 0 1 0 7 1 1 
pinseq=20
}
P 4600 1600 4900 1600 10 1 1
{
T 4500 1600 5  10 1 1 0 7 1 1 
pinnumber=mas_1_wdata_out[7:0]
T 4500 1600 5  10 0 1 0 7 1 1 
pinseq=21
}
P 4600 1800 4900 1800 10 1 1
{
T 4500 1800 5  10 1 1 0 7 1 1 
pinnumber=mas_1_addr_out[3:0]
T 4500 1800 5  10 0 1 0 7 1 1 
pinseq=22
}
P 4600 2000 4900 2000 10 1 1
{
T 4500 2000 5  10 1 1 0 7 1 1 
pinnumber=mas_0_wdata_out[7:0]
T 4500 2000 5  10 0 1 0 7 1 1 
pinseq=23
}
P 4600 2200 4900 2200 10 1 1
{
T 4500 2200 5  10 1 1 0 7 1 1 
pinnumber=mas_0_addr_out[3:0]
T 4500 2200 5  10 0 1 0 7 1 1 
pinseq=24
}
P 4600 2400 4900 2400 4 0 1
{
T 4500 2400 5  10 1 1 0 7 1 1
pinnumber=wait_out
T 4600 2400 5  10 0 1 0 7 1 1
pinseq=25
}
P 4600 2600 4900 2600 4 0 1
{
T 4500 2600 5  10 1 1 0 7 1 1
pinnumber=mas_4_wr_out
T 4600 2600 5  10 0 1 0 7 1 1
pinseq=26
}
P 4600 2800 4900 2800 4 0 1
{
T 4500 2800 5  10 1 1 0 7 1 1
pinnumber=mas_4_rd_out
T 4600 2800 5  10 0 1 0 7 1 1
pinseq=27
}
P 4600 3000 4900 3000 4 0 1
{
T 4500 3000 5  10 1 1 0 7 1 1
pinnumber=mas_4_cs_out
T 4600 3000 5  10 0 1 0 7 1 1
pinseq=28
}
P 4600 3200 4900 3200 4 0 1
{
T 4500 3200 5  10 1 1 0 7 1 1
pinnumber=mas_3_wr_out
T 4600 3200 5  10 0 1 0 7 1 1
pinseq=29
}
P 4600 3400 4900 3400 4 0 1
{
T 4500 3400 5  10 1 1 0 7 1 1
pinnumber=mas_3_rd_out
T 4600 3400 5  10 0 1 0 7 1 1
pinseq=30
}
P 4600 3600 4900 3600 4 0 1
{
T 4500 3600 5  10 1 1 0 7 1 1
pinnumber=mas_3_cs_out
T 4600 3600 5  10 0 1 0 7 1 1
pinseq=31
}
P 4600 3800 4900 3800 4 0 1
{
T 4500 3800 5  10 1 1 0 7 1 1
pinnumber=mas_2_wr_out
T 4600 3800 5  10 0 1 0 7 1 1
pinseq=32
}
P 4600 4000 4900 4000 4 0 1
{
T 4500 4000 5  10 1 1 0 7 1 1
pinnumber=mas_2_rd_out
T 4600 4000 5  10 0 1 0 7 1 1
pinseq=33
}
P 4600 4200 4900 4200 4 0 1
{
T 4500 4200 5  10 1 1 0 7 1 1
pinnumber=mas_2_cs_out
T 4600 4200 5  10 0 1 0 7 1 1
pinseq=34
}
P 4600 4400 4900 4400 4 0 1
{
T 4500 4400 5  10 1 1 0 7 1 1
pinnumber=mas_1_wr_out
T 4600 4400 5  10 0 1 0 7 1 1
pinseq=35
}
P 4600 4600 4900 4600 4 0 1
{
T 4500 4600 5  10 1 1 0 7 1 1
pinnumber=mas_1_rd_out
T 4600 4600 5  10 0 1 0 7 1 1
pinseq=36
}
P 4600 4800 4900 4800 4 0 1
{
T 4500 4800 5  10 1 1 0 7 1 1
pinnumber=mas_1_cs_out
T 4600 4800 5  10 0 1 0 7 1 1
pinseq=37
}
P 4600 5000 4900 5000 4 0 1
{
T 4500 5000 5  10 1 1 0 7 1 1
pinnumber=mas_0_wr_out
T 4600 5000 5  10 0 1 0 7 1 1
pinseq=38
}
P 4600 5200 4900 5200 4 0 1
{
T 4500 5200 5  10 1 1 0 7 1 1
pinnumber=mas_0_rd_out
T 4600 5200 5  10 0 1 0 7 1 1
pinseq=39
}
P 4600 5400 4900 5400 4 0 1
{
T 4500 5400 5  10 1 1 0 7 1 1
pinnumber=mas_0_cs_out
T 4600 5400 5  10 0 1 0 7 1 1
pinseq=40
}