Subversion Repositories socgen

v 20100214 1
B 300 0  5000 3300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 3450   5 10 1 1 0 0 1 1
device=uart_tx
T 400 3650 5 10 1 1 0 0 1 1
refdes=U?
T 400 3800    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 3800    0 10 0 1 0 0 1 1
library=logic
T 400 3800    0 10 0 1 0 0 1 1
component=uart
T 400 3800    0 10 0 1 0 0 1 1
version=tx
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=txd_data_in[SIZE-1:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=divider_in[DIV_SIZE-1:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 4 0 1  
{
T 400 600 5 10 1 1 0 1 1 1 
pinnumber=txd_parity
T 400 600 5 10 0 1 0 1 1 1 
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=txd_load
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=txd_force_parity
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=txd_break
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=rxd_parity
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=rxd_pad_in
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 300 1800 0 1800 4 0 1  
{
T 400 1800 5 10 1 1 0 1 1 1 
pinnumber=rxd_force_parity
T 400 1800 5 10 0 1 0 1 1 1 
pinseq=9
}
P 300 2000 0 2000 4 0 1  
{
T 400 2000 5 10 1 1 0 1 1 1 
pinnumber=rxd_data_avail_stb
T 400 2000 5 10 0 1 0 1 1 1 
pinseq=10
}
P 300 2200 0 2200 4 0 1  
{
T 400 2200 5 10 1 1 0 1 1 1 
pinnumber=rts_in
T 400 2200 5 10 0 1 0 1 1 1 
pinseq=11
}
P 300 2400 0 2400 4 0 1  
{
T 400 2400 5 10 1 1 0 1 1 1 
pinnumber=reset
T 400 2400 5 10 0 1 0 1 1 1 
pinseq=12
}
P 300 2600 0 2600 4 0 1  
{
T 400 2600 5 10 1 1 0 1 1 1 
pinnumber=parity_enable
T 400 2600 5 10 0 1 0 1 1 1 
pinseq=13
}
P 300 2800 0 2800 4 0 1  
{
T 400 2800 5 10 1 1 0 1 1 1 
pinnumber=cts_pad_in
T 400 2800 5 10 0 1 0 1 1 1 
pinseq=14
}
P 300 3000 0 3000 4 0 1  
{
T 400 3000 5 10 1 1 0 1 1 1 
pinnumber=clk
T 400 3000 5 10 0 1 0 1 1 1 
pinseq=15
}
P 5300 200 5600 200 10 1 1
{
T 5200 200 5  10 1 1 0 7 1 1 
pinnumber=rxd_data_out[SIZE-1:0]
T 5200 200 5  10 0 1 0 7 1 1 
pinseq=16
}
P 5300 400 5600 400 4 0 1
{
T 5200 400 5  10 1 1 0 7 1 1
pinnumber=txd_pad_out
T 5300 400 5  10 0 1 0 7 1 1
pinseq=17
}
P 5300 600 5600 600 4 0 1
{
T 5200 600 5  10 1 1 0 7 1 1
pinnumber=txd_buffer_empty
T 5300 600 5  10 0 1 0 7 1 1
pinseq=18
}
P 5300 800 5600 800 4 0 1
{
T 5200 800 5  10 1 1 0 7 1 1
pinnumber=rxd_stop_error
T 5300 800 5  10 0 1 0 7 1 1
pinseq=19
}
P 5300 1000 5600 1000 4 0 1
{
T 5200 1000 5  10 1 1 0 7 1 1
pinnumber=rxd_parity_error
T 5300 1000 5  10 0 1 0 7 1 1
pinseq=20
}
P 5300 1200 5600 1200 4 0 1
{
T 5200 1200 5  10 1 1 0 7 1 1
pinnumber=rxd_data_avail
T 5300 1200 5  10 0 1 0 7 1 1
pinseq=21
}
P 5300 1400 5600 1400 4 0 1
{
T 5200 1400 5  10 1 1 0 7 1 1
pinnumber=rts_pad_out
T 5300 1400 5  10 0 1 0 7 1 1
pinseq=22
}
P 5300 1600 5600 1600 4 0 1
{
T 5200 1600 5  10 1 1 0 7 1 1
pinnumber=cts_out
T 5300 1600 5  10 0 1 0 7 1 1
pinseq=23
}