Subversion Repositories socgen

<?xml version="1.0" encoding="UTF-8"?>
<!--
//                                                                        //
// Author : John Eaton  Ouabache Designworks                              //
//                                                                        //
//   Copyright (C) 2010 Authors and OPENCORES.ORG                         //
//                                                                        //
//   This source file may be used and distributed without                 //
//   restriction provided that this copyright statement is not            //
//   removed from the file and that any derivative work contains          //
//   the original copyright notice and the associated disclaimer.         //
//                                                                        //
//   This source file is free software; you can redistribute it           //
//   and/or modify it under the terms of the GNU Lesser General           //
//   Public License as published by the Free Software Foundation;         //
//   either version 2.1 of the License, or (at your option) any           //
//   later version.                                                       //
//                                                                        //
//   This source is distributed in the hope that it will be               //
//   useful, but WITHOUT ANY WARRANTY; without even the implied           //
//   warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR              //
//   PURPOSE. See the GNU Lesser General Public License for more          //
//   details.                                                             //
//                                                                        //
//   You should have received a copy of the GNU Lesser General            //
//   Public License along with this source; if not, download it           //
//   from http://www.opencores.org/lgpl.shtml                             //
//                                                                        //
-->
<spirit:design 
xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009"
xmlns:socgen="http://opencores.org"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009
http://www.spiritconsortium.org/XMLSchema/SPIRIT/1685-2009/index.xsd">

<spirit:vendor>opencores.org</spirit:vendor>
<spirit:library>logic</spirit:library>
<spirit:name>flash_memcontrl</spirit:name>
<spirit:version>bfm.design</spirit:version>  


     <spirit:adHocConnections>


    <spirit:adHocConnection>
      <spirit:name>clk</spirit:name>
      <spirit:externalPortReference spirit:portRef="slave_clk_clk"/>
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="clk"/>
     </spirit:adHocConnection>

    <spirit:adHocConnection>
      <spirit:name>reset</spirit:name>
      <spirit:externalPortReference spirit:portRef="slave_reset_reset"/>
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="reset"/>
    </spirit:adHocConnection>


    <spirit:adHocConnection>
      <spirit:name>Addr</spirit:name>
      <spirit:externalPortReference spirit:portRef="Addr"  spirit:left="23"  spirit:right="0"       />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="addr"/>
    </spirit:adHocConnection>

    <spirit:adHocConnection>
      <spirit:name>wdata</spirit:name>
      <spirit:externalPortReference spirit:portRef="wdata"  spirit:left="15"  spirit:right="0"       />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="wdata"/>
    </spirit:adHocConnection>

    <spirit:adHocConnection>
      <spirit:name>rdata</spirit:name>
      <spirit:externalPortReference spirit:portRef="rdata"  spirit:left="15"  spirit:right="0"       />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="rdata"/>
    </spirit:adHocConnection>



    <spirit:adHocConnection>
      <spirit:name>cs</spirit:name>
      <spirit:externalPortReference spirit:portRef="cs"        />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="cs"/>
    </spirit:adHocConnection>


    <spirit:adHocConnection>
      <spirit:name>rd</spirit:name>
      <spirit:externalPortReference spirit:portRef="rd"        />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="rd"/>
    </spirit:adHocConnection>

    <spirit:adHocConnection>
      <spirit:name>wr</spirit:name>
      <spirit:externalPortReference spirit:portRef="wr"        />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="wr"/>
    </spirit:adHocConnection>


    <spirit:adHocConnection>
      <spirit:name>ub</spirit:name>
      <spirit:externalPortReference spirit:portRef="ub"        />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="ub"/>
    </spirit:adHocConnection>


    <spirit:adHocConnection>
      <spirit:name>lb</spirit:name>
      <spirit:externalPortReference spirit:portRef="lb"        />
      <spirit:internalPortReference spirit:componentRef="bus16" spirit:portRef="lb"/>
    </spirit:adHocConnection>

     </spirit:adHocConnections>

<spirit:componentInstances>



<spirit:componentInstance>
<spirit:instanceName>PSRAM</spirit:instanceName> <spirit:componentRef spirit:vendor="opencores.org" spirit:library="Testbench" spirit:name="mt45w8mw12" spirit:version="def" />
</spirit:componentInstance>

<spirit:componentInstance>
<spirit:instanceName>bus16</spirit:instanceName> <spirit:componentRef spirit:vendor="opencores.org" spirit:library="Testbench" spirit:name="micro_bus16_model" spirit:version="def" />
</spirit:componentInstance>


<spirit:componentInstance>
<spirit:instanceName>MEMDB_BUFF</spirit:instanceName> <spirit:componentRef spirit:vendor="opencores.org" spirit:library="cde" spirit:name="pad" spirit:version="se_dig" />

</spirit:componentInstance>







</spirit:componentInstances>





</spirit:design>