URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [serial_rcvr/] [sim/] [testbenches/] [verilog/] [top.ext] - Rev 131
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reg R_edge_enable ;
reg R_parity_enable ;
reg R_parity_type ;
reg R_parity_force ;
reg R_start_value ;
reg R_pad_in ;
reg R_rcv_stb ;
assign edge_enable = R_edge_enable ;
assign parity_enable = R_parity_enable ;
assign parity_type = R_parity_type ;
assign parity_force = R_parity_force ;
assign start_value = R_start_value ;
assign pad_in = serial ;
assign rcv_stb = R_rcv_stb ;
assign STOP = 1'b0;
assign BAD = 1'b0;