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[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [logic/] [ip/] [usb_epp/] [rtl/] [verilog/] [top.body] - Rev 133

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assign        eppwait_out   =  1'b0;      
assign        eppwait_oe    =  1'b0;
assign        usbwr_out     =  1'b0;
assign        usbwr_oe      =  1'b0;
assign        usbmode_out   =  1'b0;
assign        usbmode_oe    =  1'b0;
assign        usboe_out     =  1'b0;
assign        usboe_oe      =  1'b0;
assign        usbadr_out    = 2'b00;
assign        usbadr_oe     =  1'b0;
assign        usbpktend_out =  1'b0;
assign        usbpktend_oe  =  1'b0;
assign        usbdir_out    =  1'b0;
assign        usbdir_oe     =  1'b0;
assign        eppdb_out     = 8'h00;
assign        eppdb_oe      =  1'b0;
assign        usbclk_out    =  1'b0;
assign        usbclk_oe     =  1'b0;



 


   

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