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B 300 0  3600 1500 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 1650   5 10 1 1 0 0 1 1
device=model_master
T 400 1850 5 10 1 1 0 0 1 1
refdes=U?
T 400 2000    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 2000    0 10 0 1 0 0 1 1
library=wishbone
T 400 2000    0 10 0 1 0 0 1 1
component=model
T 400 2000    0 10 0 1 0 0 1 1
version=master
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=din[dwidth-1:0]
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pinseq=1
}
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{
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pinseq=3
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pinnumber=err
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pinseq=4
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P 300 1000 0 1000 4 0 1  
{
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pinnumber=clk
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
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P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=ack
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
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P 3900 200 4200 200 10 1 1
{
T 3800 200 5  10 1 1 0 7 1 1 
pinnumber=sel[dwidth/8-1:0]
T 3800 200 5  10 0 1 0 7 1 1 
pinseq=7
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P 3900 400 4200 400 10 1 1
{
T 3800 400 5  10 1 1 0 7 1 1 
pinnumber=dout[dwidth-1:0]
T 3800 400 5  10 0 1 0 7 1 1 
pinseq=8
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P 3900 600 4200 600 10 1 1
{
T 3800 600 5  10 1 1 0 7 1 1 
pinnumber=adr[awidth-1:0]
T 3800 600 5  10 0 1 0 7 1 1 
pinseq=9
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{
T 3800 800 5  10 1 1 0 7 1 1
pinnumber=we
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P 3900 1000 4200 1000 4 0 1
{
T 3800 1000 5  10 1 1 0 7 1 1
pinnumber=stb
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P 3900 1200 4200 1200 4 0 1
{
T 3800 1200 5  10 1 1 0 7 1 1
pinnumber=cyc
T 3900 1200 5  10 0 1 0 7 1 1
pinseq=12
}