OpenCores
URL https://opencores.org/ocsvn/socgen/socgen/trunk

Subversion Repositories socgen

[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [doc/] [sym/] [wb_memory_def.sym] - Rev 135

Compare with Previous | Blame | View Log

v 20100214 1
B 300 0  5200 1900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 2050   5 10 1 1 0 0 1 1
device=wb_memory_def
T 400 2250 5 10 1 1 0 0 1 1
refdes=U?
T 400 2400    0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 2400    0 10 0 1 0 0 1 1
library=wishbone
T 400 2400    0 10 0 1 0 0 1 1
component=wb_memory
T 400 2400    0 10 0 1 0 0 1 1
version=def
P 300 200 0 200 10 1 1 
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=sel_i[wb_byte_lanes-1:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1 
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=dat_i[wb_data_width-1:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1 
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=adr_i[wb_addr_width-1:0]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 4 0 1  
{
T 400 800 5 10 1 1 0 1 1 1 
pinnumber=we_i
T 400 800 5 10 0 1 0 1 1 1 
pinseq=4
}
P 300 1000 0 1000 4 0 1  
{
T 400 1000 5 10 1 1 0 1 1 1 
pinnumber=stb_i
T 400 1000 5 10 0 1 0 1 1 1 
pinseq=5
}
P 300 1200 0 1200 4 0 1  
{
T 400 1200 5 10 1 1 0 1 1 1 
pinnumber=rst_i
T 400 1200 5 10 0 1 0 1 1 1 
pinseq=6
}
P 300 1400 0 1400 4 0 1  
{
T 400 1400 5 10 1 1 0 1 1 1 
pinnumber=cyc_i
T 400 1400 5 10 0 1 0 1 1 1 
pinseq=7
}
P 300 1600 0 1600 4 0 1  
{
T 400 1600 5 10 1 1 0 1 1 1 
pinnumber=clk_i
T 400 1600 5 10 0 1 0 1 1 1 
pinseq=8
}
P 5500 200 5800 200 10 1 1
{
T 5400 200 5  10 1 1 0 7 1 1 
pinnumber=dat_o[wb_data_width-1:0]
T 5400 200 5  10 0 1 0 7 1 1 
pinseq=9
}
P 5500 400 5800 400 4 0 1
{
T 5400 400 5  10 1 1 0 7 1 1
pinnumber=ack_o
T 5500 400 5  10 0 1 0 7 1 1
pinseq=10
}

Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.