URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [Projects/] [opencores.org/] [wishbone/] [doc/] [sym/] [wb_uart16550_bus32_big.sym] - Rev 135
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v 20100214 1
B 300 0 3200 2900 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 3050 5 10 1 1 0 0 1 1
device=wb_uart16550_bus32_big
T 400 3250 5 10 1 1 0 0 1 1
refdes=U?
T 400 3400 0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 3400 0 10 0 1 0 0 1 1
library=wishbone
T 400 3400 0 10 0 1 0 0 1 1
component=wb_uart16550
T 400 3400 0 10 0 1 0 0 1 1
version=bus32_big
P 300 200 0 200 10 1 1
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=wb_sel_i[3:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 10 1 1
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=wb_dat_i[31:0]
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 10 1 1
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=wb_adr_i[7:2]
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 4 0 1
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=wb_we_i
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 4 0 1
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=wb_stb_i
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 4 0 1
{
T 400 1200 5 10 1 1 0 1 1 1
pinnumber=wb_rst_i
T 400 1200 5 10 0 1 0 1 1 1
pinseq=6
}
P 300 1400 0 1400 4 0 1
{
T 400 1400 5 10 1 1 0 1 1 1
pinnumber=wb_cyc_i
T 400 1400 5 10 0 1 0 1 1 1
pinseq=7
}
P 300 1600 0 1600 4 0 1
{
T 400 1600 5 10 1 1 0 1 1 1
pinnumber=wb_clk_i
T 400 1600 5 10 0 1 0 1 1 1
pinseq=8
}
P 300 1800 0 1800 4 0 1
{
T 400 1800 5 10 1 1 0 1 1 1
pinnumber=srx_pad_i
T 400 1800 5 10 0 1 0 1 1 1
pinseq=9
}
P 300 2000 0 2000 4 0 1
{
T 400 2000 5 10 1 1 0 1 1 1
pinnumber=ri_pad_i
T 400 2000 5 10 0 1 0 1 1 1
pinseq=10
}
P 300 2200 0 2200 4 0 1
{
T 400 2200 5 10 1 1 0 1 1 1
pinnumber=dsr_pad_i
T 400 2200 5 10 0 1 0 1 1 1
pinseq=11
}
P 300 2400 0 2400 4 0 1
{
T 400 2400 5 10 1 1 0 1 1 1
pinnumber=dcd_pad_i
T 400 2400 5 10 0 1 0 1 1 1
pinseq=12
}
P 300 2600 0 2600 4 0 1
{
T 400 2600 5 10 1 1 0 1 1 1
pinnumber=cts_pad_i
T 400 2600 5 10 0 1 0 1 1 1
pinseq=13
}
P 3500 200 3800 200 10 1 1
{
T 3400 200 5 10 1 1 0 7 1 1
pinnumber=wb_dat_o[31:0]
T 3400 200 5 10 0 1 0 7 1 1
pinseq=14
}
P 3500 400 3800 400 4 0 1
{
T 3400 400 5 10 1 1 0 7 1 1
pinnumber=wb_ack_o
T 3500 400 5 10 0 1 0 7 1 1
pinseq=15
}
P 3500 600 3800 600 4 0 1
{
T 3400 600 5 10 1 1 0 7 1 1
pinnumber=stx_pad_o
T 3500 600 5 10 0 1 0 7 1 1
pinseq=16
}
P 3500 800 3800 800 4 0 1
{
T 3400 800 5 10 1 1 0 7 1 1
pinnumber=rts_pad_o
T 3500 800 5 10 0 1 0 7 1 1
pinseq=17
}
P 3500 1000 3800 1000 4 0 1
{
T 3400 1000 5 10 1 1 0 7 1 1
pinnumber=int_o
T 3500 1000 5 10 0 1 0 7 1 1
pinseq=18
}
P 3500 1200 3800 1200 4 0 1
{
T 3400 1200 5 10 1 1 0 7 1 1
pinnumber=dtr_pad_o
T 3500 1200 5 10 0 1 0 7 1 1
pinseq=19
}
P 3500 1400 3800 1400 4 0 1
{
T 3400 1400 5 10 1 1 0 7 1 1
pinnumber=baud_o
T 3500 1400 5 10 0 1 0 7 1 1
pinseq=20
}