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https://opencores.org/ocsvn/socgen/socgen/trunk
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[/] [socgen/] [trunk/] [Projects/] [valentfx.com/] [fpgas/] [doc/] [sch/] [iceskate_default.sch] - Rev 135
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v 20100214 1
C 1500 300 1 0 0 in_port_vector.sym
{
T 1500 300 5 10 1 1 0 6 1 1
refdes=SW[1:0]
}
C 1500 700 1 0 0 in_port_vector.sym
{
T 1500 700 5 10 1 1 0 6 1 1
refdes=BTN[1:0]
}
C 1500 1100 1 0 0 in_port.sym
{
T 1500 1100 5 10 1 1 0 6 1 1
refdes=SYS_SPI_SCK
}
C 1500 1500 1 0 0 in_port.sym
{
T 1500 1500 5 10 1 1 0 6 1 1
refdes=SYS_SPI_MOSI
}
C 1500 1900 1 0 0 in_port.sym
{
T 1500 1900 5 10 1 1 0 6 1 1
refdes=RP_SPI_CE0N
}
C 1500 2300 1 0 0 in_port.sym
{
T 1500 2300 5 10 1 1 0 6 1 1
refdes=JTAG_TRESET_N
}
C 1500 2700 1 0 0 in_port.sym
{
T 1500 2700 5 10 1 1 0 6 1 1
refdes=JTAG_TMS
}
C 1500 3100 1 0 0 in_port.sym
{
T 1500 3100 5 10 1 1 0 6 1 1
refdes=JTAG_TDI
}
C 1500 3500 1 0 0 in_port.sym
{
T 1500 3500 5 10 1 1 0 6 1 1
refdes=JTAG_TCK
}
C 1500 3900 1 0 0 in_port.sym
{
T 1500 3900 5 10 1 1 0 6 1 1
refdes=A_CLK
}
C 4000 300 1 0 0 out_port_vector.sym
{
T 5000 300 5 10 1 1 0 0 1 1
refdes=PMOD3[7:0]
}
C 4000 700 1 0 0 out_port_vector.sym
{
T 5000 700 5 10 1 1 0 0 1 1
refdes=PMOD2[7:0]
}
C 4000 1100 1 0 0 out_port_vector.sym
{
T 5000 1100 5 10 1 1 0 0 1 1
refdes=LED[1:0]
}
C 4000 1500 1 0 0 out_port.sym
{
T 5000 1500 5 10 1 1 0 0 1 1
refdes=SYS_SPI_MISO
}
C 4000 1900 1 0 0 out_port.sym
{
T 5000 1900 5 10 1 1 0 0 1 1
refdes=JTAG_TDO
}
C 4000 2300 1 0 0 io_port_vector.sym
{
T 5000 2300 5 10 1 1 0 0 1 1
refdes=PMOD4[7:0]
}
C 4000 2700 1 0 0 io_port_vector.sym
{
T 5000 2700 5 10 1 1 0 0 1 1
refdes=PMOD1[7:0]
}