URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [common/] [opencores.org/] [Testbench/] [bfms/] [ps2_model/] [rtl/] [verilog/] [top.tasks] - Rev 135
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initial
begin
device_write <= 1'b0;
device_tx_data <= 8'h00;
device_tx_parity <= 1'b0;
device_ack <= 1'b1;
device_stop <= 1'b1;
exp_device_rx_data <= 8'h00;
mask_device_rx_data <= 8'h00;
exp_device_rx_parity <= 1'b0;
mask_device_rx_parity <= 1'b0;
end
task next;
input [31:0] num;
repeat (num) @ (posedge clk);
endtask
task send_byte;
input [7:0] byte_out;
begin
while(tap_state != IDLE) next(1);
$display("%t %m %2h parity %b",$realtime ,byte_out,device_tx_parity );
device_tx_data <= byte_out;
next(1);
device_write <= 1'b1;
next(1);
device_write <= 1'b0;
end
endtask // send_byte
task rcv_byte;
input [7:0] byte_in;
input parity;
begin
exp_device_rx_data <= byte_in;
exp_device_rx_parity <= parity;
while(!device_rx_read) next(1);
$display("%t checking %h %b",$realtime,byte_in,parity);
mask_device_rx_data <= 8'hff;
mask_device_rx_parity <= 1'b1;
next(1);
mask_device_rx_data <= 8'h00;
mask_device_rx_parity <= 1'b0;
end
endtask
always@(posedge clk)
if( device_rx_read)
$display ("%t %m device rec %h parity %b",$realtime,device_rx_data,device_rx_parity);
always@(posedge clk)
if(device_write)
$display ("%t %m device send %h parity %b stop %b ",$realtime,device_tx_data,device_tx_parity,device_stop);
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