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https://opencores.org/ocsvn/socgen/socgen/trunk
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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [reset/] [rtl/] [verilog/] [reset_asyncdisable.v] - Rev 131
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module cde_reset_asyncdisable #(parameter WIDTH = 1 ) ( input wire reset, input wire reset_n, input wire atg_asyncdisable, input wire [WIDTH - 1:0] sync_reset, output wire [WIDTH - 1:0] reset_n_out, output wire [WIDTH - 1:0] reset_out ); assign reset_out = sync_reset | {WIDTH{reset}}; assign reset_n_out = (~sync_reset | {WIDTH{atg_asyncdisable}}) & {WIDTH{reset_n}}; endmodule