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https://opencores.org/ocsvn/socgen/socgen/trunk
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[/] [socgen/] [trunk/] [common/] [opencores.org/] [cde/] [ip/] [serial/] [doc/] [sym/] [cde_serial_xmit.sym] - Rev 135
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v 20100214 1
B 300 0 3100 2300 3 60 0 0 -1 -1 0 -1 -1 -1 -1 -1
T 400 2450 5 10 1 1 0 0 1 1
device=cde_serial_xmit
T 400 2650 5 10 1 1 0 0 1 1
refdes=U?
T 400 2800 0 10 0 1 0 0 1 1
vendor=opencores.org
T 400 2800 0 10 0 1 0 0 1 1
library=cde
T 400 2800 0 10 0 1 0 0 1 1
component=serial
T 400 2800 0 10 0 1 0 0 1 1
version=xmit
P 300 200 0 200 10 1 1
{
T 400 200 5 10 1 1 0 1 1 1
pinnumber=data[WIDTH-1:0]
T 400 200 5 10 0 1 0 1 1 1
pinseq=1
}
P 300 400 0 400 4 0 1
{
T 400 400 5 10 1 1 0 1 1 1
pinnumber=stop_value
T 400 400 5 10 0 1 0 1 1 1
pinseq=2
}
P 300 600 0 600 4 0 1
{
T 400 600 5 10 1 1 0 1 1 1
pinnumber=start_value
T 400 600 5 10 0 1 0 1 1 1
pinseq=3
}
P 300 800 0 800 4 0 1
{
T 400 800 5 10 1 1 0 1 1 1
pinnumber=reset
T 400 800 5 10 0 1 0 1 1 1
pinseq=4
}
P 300 1000 0 1000 4 0 1
{
T 400 1000 5 10 1 1 0 1 1 1
pinnumber=parity_type
T 400 1000 5 10 0 1 0 1 1 1
pinseq=5
}
P 300 1200 0 1200 4 0 1
{
T 400 1200 5 10 1 1 0 1 1 1
pinnumber=parity_force
T 400 1200 5 10 0 1 0 1 1 1
pinseq=6
}
P 300 1400 0 1400 4 0 1
{
T 400 1400 5 10 1 1 0 1 1 1
pinnumber=parity_enable
T 400 1400 5 10 0 1 0 1 1 1
pinseq=7
}
P 300 1600 0 1600 4 0 1
{
T 400 1600 5 10 1 1 0 1 1 1
pinnumber=load
T 400 1600 5 10 0 1 0 1 1 1
pinseq=8
}
P 300 1800 0 1800 4 0 1
{
T 400 1800 5 10 1 1 0 1 1 1
pinnumber=edge_enable
T 400 1800 5 10 0 1 0 1 1 1
pinseq=9
}
P 300 2000 0 2000 4 0 1
{
T 400 2000 5 10 1 1 0 1 1 1
pinnumber=clk
T 400 2000 5 10 0 1 0 1 1 1
pinseq=10
}
P 3400 200 3700 200 4 0 1
{
T 3300 200 5 10 1 1 0 7 1 1
pinnumber=ser_out
T 3400 200 5 10 0 1 0 7 1 1
pinseq=11
}
P 3400 400 3700 400 4 0 1
{
T 3300 400 5 10 1 1 0 7 1 1
pinnumber=buffer_empty
T 3400 400 5 10 0 1 0 7 1 1
pinseq=12
}