Subversion Repositories socgen

reg [WIDTH - 1:0]         hysteresis_data; 
reg [WIDTH - 1:0]         clean_data; 
reg [DEBOUNCE_SIZE-1:0]        debounce_counter;

always@(posedge clk ) 
  if(reset)  
     begin
     data_out  <= data_in;
     data_rise <= {WIDTH{1'b0}};
     data_fall <= {WIDTH{1'b0}};
     end
  else
     begin
     data_out  <= clean_data;
     data_rise <= clean_data &( data_out  ^ clean_data);
     data_fall <= data_out   &( data_out  ^ clean_data);
     end



   




always@(posedge clk ) 
       if(reset)
         begin
            clean_data             <= data_in;
            hysteresis_data        <= data_in;
            debounce_counter       <= {DEBOUNCE_SIZE{1'b0}};
         end
       else
         begin
         // if the current input data differs from hysteresis 
         // then reset counter and update hysteresie
         
         if(data_in != hysteresis_data )
              begin 
              clean_data           <= clean_data;
              hysteresis_data      <= data_in;
              debounce_counter     <= {DEBOUNCE_SIZE{1'b0}};
              end
        // if counter reaches DEBOUNCE_DELAY then the signal is clean
         else 
         if(debounce_counter == DEBOUNCE_DELAY)
              begin
              clean_data           <= hysteresis_data;
              hysteresis_data      <= hysteresis_data; 
              debounce_counter     <= debounce_counter;
              end                
           // data_in did not change but counter did not reach limit. Increment counter
         else
              begin
              clean_data           <= clean_data;
              hysteresis_data      <= hysteresis_data; 
              debounce_counter     <= debounce_counter+1;                
              end 
         end