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[/] [socgen/] [trunk/] [doc/] [src/] [drawing/] [sch/] [reset_fig1.sch] - Rev 128

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v 20100214 2
C 58400 44700 1 0 0 frame_800x600.sym
C 64300 48500 1 0 0 reg.sym
{
T 66100 50300 5 10 0 0 0 0 1
device=REGISTER
T 65600 50500 5 10 1 1 0 6 1
refdes=U?
}
C 60400 45600 1 0 0 reg_rst.sym
{
T 62200 47400 5 10 0 0 0 0 1
device=REGISTER_RST
T 61700 47600 5 10 1 1 0 6 1
refdes=U?
}
C 63000 49800 1 0 0 and2-1.sym
{
T 63400 49700 5 10 1 1 0 2 1
refdes=U?
T 63400 49900 5 8 0 0 0 0 1
device=and
}
C 65900 49600 1 0 0 and2-1.sym
{
T 66300 49500 5 10 1 1 0 2 1
refdes=U?
T 66300 49700 5 8 0 0 0 0 1
device=and
}
C 60400 48500 1 0 0 reg.sym
{
T 62200 50300 5 10 0 0 0 0 1
device=REGISTER
T 61700 50500 5 10 1 1 0 6 1
refdes=U?
}
C 59100 49800 1 0 0 and2-1.sym
{
T 59500 49700 5 10 1 1 0 2 1
refdes=U?
T 59500 49900 5 8 0 0 0 0 1
device=and
}
C 64300 45600 1 0 0 reg_rst.sym
{
T 66100 47400 5 10 0 0 0 0 1
device=REGISTER_RST
T 65600 47600 5 10 1 1 0 6 1
refdes=U?
}
C 63000 46900 1 0 0 and2-1.sym
{
T 63400 46800 5 10 1 1 0 2 1
refdes=U?
T 63400 47000 5 8 0 0 0 0 1
device=and
}
N 59100 49900 59100 48200 4
N 58500 48200 65900 48200 4
N 63000 48200 63000 49900 4
N 65900 49700 65900 48200 4
N 61200 45500 61200 45600 4
N 58500 45500 65100 45500 4
N 63000 45500 63000 47000 4
N 65100 45600 65100 45500 4
T 60300 45100 9 10 1 0 0 0 1
ASYNCHRONOUS
T 64900 45100 9 10 1 0 0 0 1
BOTH
T 60500 51000 9 10 1 0 0 0 1
SYNCHRONOUS
T 64400 50800 9 10 1 0 0 0 2
SYNCHRONOUS
 with OVERRIDE

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