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<p><br>
<br>
</p>
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<h1><a name="socgen_project"></a><font size="+3">SOCGEN Project</font></h1>
<h2><br>
</h2>
The mission of the SOCGEN project is to provide a blueprint showing
digital designers how to create a System_on_chip (SOC) by
assembling&nbsp; components created by a variety of sources. It will
show how to create a component that can be reused and provides&nbsp; a
free opensourced tool set&nbsp; that can be used to assemble and verify
a design. It employs modern design for reuse techniques to reduce the
waste and ineffiencies that is inherent in handcrafting a design<br>
<br>
<br>
<br>
<br>
<br>
<br>
<h2><a name="manifesto"></a><font size="+2">Principles for Reusable
design</font><br>
</h2>
<p><br>
</p>
<br>
<h2><font size="+1">Plan ahead<br>
</font></h2>
You may start a design with the intent that it is only going to be used
for one specific purpose only to find out later that other designers
want to use it. Create all designs with the intent that they will be
reused in ways that you haven't imagined and you won't have to scramble
later.&nbsp; <br>
<br>
<h2><font><font size="+1">Design for the lowest common demoninator</font></font></h2>
Everybody loves to use some quirky little feature of the design target
to squeeze a little extra preformance out of the system. But if you do
then you are locked into that target and cannot easily reuse the design
on a different target. Why do you think they put those features in the
first place? Instead you should survey the field and only use the
features that all target technologies can match<br>
<br>
<br>
<h2><font><font><font><font size="+1">Design in a completely generic
technology<br>
</font></font></font></font></h2>
Design is a two step process. First the design is created and verified
in a completely generic behaverioral RTL format and then converted into
the target technology. It is tempting to try to save time be designing
in the target technology but this will make it harder to reuse.<br>
<br>
<br>
<h2><font><font><font><font><font><font><font><font size="+1">Automate
Everything</font></font></font></font></font></font></font></font><br>
</h2>
<p>
Handcrafting a design file is a time consuming and error prone
operation. Tasks that are preformed on every design should be done by a
tool.&nbsp; The designers job is to create the configuration files
needed by the tools and let automation do all the work.<br>
</p>
<p><br>
</p>
<h2><font><font><font><font><font><font><font><font size="+1">Never
Check Generated Files into a Database</font></font></font></font></font></font></font></font></h2>
The Revision Control System (RCS) that contains the design should only
contain the minimul seed data needed to rebuild the entire design. It
should never contain any files that were generated by the build
process. <br>
<br>
<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
 size="+1">Do not keep duplicate copies of a file in the database</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
Doing so makes it difficult to ensure that bug fixes and enhancements
created by one user can be made available to all users. Every file
should have one and only one location in the database<br>
<br>
<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
 size="+1">Do not build&nbsp; the design inside of an RCS database.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
It is really hard to keep track of all the new files that you have
added that you need to check into the RCS&nbsp; if they are buried by
gigabytes of generated files from the build process. Use symbolic links
to create a work area where generated files are kept outside the
database.<br>
<br>
<p>
</p>
<p></p>
<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
 size="+1">Store files based on their source and not their use.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
Are you creating a chip using IP from Joe's IP Emporium? Why not create
a spot inside your chip database for Joes files? Because that is not
planning ahead. Later if your lab starts another chip that also uses
Joes IP then they will also need access to those files. Create a spot
for files where everybody can simply access them by linking the desired
files into there database<font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
 size="+1">.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font>
<p></p>
<h2><br>
</h2>
<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font
 size="+1">Do not mix unlike objects in the same container.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
<p>"Unlike" is a delibertely nebulious term. It can mean anything and
everything. If you have a instance of a hard macro that is
unsynthesizable then do not put it in a file along with synthesisable
rtl code. If you have code belonging to one designer then do not mix it
with code belonging to another. If you do then you have to worry about
file locking. Fragment the design so that each object is in it's own
container and then use a tool to put them back together.<br>
</p>
<br>
<br>
<h2><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font><font>Layer
the
design.</font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></font></h2>
<p>A full design will consist of several different databases that are
layered. Upper ones may override any content from a lower layer<br>
</p>
<p><br>
<br>
</p>
<br>
<br>
<br>
<h2><a name="manifesto"></a>Database Guidelines</h2>
<p></p>
<p></p>
<br>
<p><img style="width: 800px; height: 600px;" alt=""
 src="../png/data_fig1.png"><br>
<br>
</p>
<p><br>
<br>
</p>
<h2>SYSTEM<br>
</h2>
<p>A system&nbsp; is at least&nbsp; one PCA containing a targeted
component&nbsp; interconnected with&nbsp;
other electronic components and bus functional models. <br>
</p>
<p><br>
</p>
<h2>TARGET</h2>
<p>A target is a specific physical design that can implement a
component. Targets can be asic or fpga and include a Printed circuit
board(PCB) that may include other electronic components. The goal for
all components is to assign them to at least one target and prove that
the work in silicon<br>
</p>
<p>
<br>
<br>
</p>
<h2>PROJECT</h2>
<p>A project is a collection of components. A database must define at
least one project to create an area where components may be stored.
Other projects may be created as needed to group similar components
together and reducing clutter. If any component in a project uses a
component from a child project then that child project must also be
included in the parent project.</p>
<p><br>
<br>
</p>
<p><br>
<br>
</p>
<h2>COMPONENT</h2>
<p>A component is a&nbsp; basic building block that may be used to make
other components.</p>
<br>
<p>
</p>
<br>
<h2>LIB</h2>
<p>A library is a collection of building blocks&nbsp; that may not be
synthesiable in
all target technologies and may require customizations. The use of lib
parts in the rtl code will
facilitate porting a component into different technologies.</p>
<p><br>
</p>
<h2>TOOLS<br>
</h2>
<p>The tools directory contains all of the socgen tools needed to build
, simulate and synthesise all of the systems and components in the
database. Scripts and installation instructions are provided for any
other opensource tools that may be required. There are also
instructions for any propritory tools that are used.<br>
</p>
<br>
<p><br>
<br>
</p>
<h2>BENCH<br>
</h2>
<p>A testbench is used for all simulations and test suites. Any system
or component may be simulated. Components can only do generic rtl sims
while systems may do either generic rtl ,specific rtl or gate sims.
Generic rtl models are included in the socgen library, specific ones
must be obtained from the IC vendor.<br>
</p>
<p><br>
</p>
<br>
<h2>DOC<br>
</h2>
The documentation&nbsp; directory.
<br>
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