URL
https://opencores.org/ocsvn/socgen/socgen/trunk
Subversion Repositories socgen
[/] [socgen/] [trunk/] [tools/] [synthesys/] [targets/] [ip/] [Basys/] [bsdl/] [xc3s100e_tq144.bsd] - Rev 119
Compare with Previous | Blame | View Log
-- $ XILINX$RCSfile: xc3s100e_tq144.bsd,v $
-- $ XILINX$Revision: 1.7 $
--
-- BSDL file for device XC3S100E_TQ144
-- Xilinx, Inc. $State: PRELIMINARY $ $Date: 2008-05-29 16:00:42-07 $
-- Generated by BSDLnet bsdlnet Version 1.39a
------------------------------------------------------------------------
-- Modification History
-- | Generated on 05/28/08
-- | CR # 471899
-- | Details - Initial Release using BSDLnet.
-- | Added 'attribute COMPLIANCE_PATTERNS' & changed boundary
-- | register attribute to internal for PROG_B & PUDC_B.
------------------------------------------------------------------------
--
-- For technical support, http://support.xilinx.com -> enter text 'bsdl'
-- in the text search box at the left of the page. If none of
-- these records resolve your problem you should open a web support case
-- or contact our technical support at:
-- This BSDL file reflects the pre-configuration JTAG behavior.
-- =================================================
-- North American Support
-- (Mon,Tues,Wed,Fri 6:30am-5pm
-- Thr 6:30am - 4:00pm Pacific Standard Time)
-- Hotline: 1-800-255-7778
-- or (408) 879-5199
-- Fax: (408) 879-4442
-- Email: hotline\@xilinx.com
-- United Kingdom Support
-- (Mon-Fri 08:00 to 17:30 GMT)
-- Hotline: +44 870 7350 610
-- Fax: +44 870 7350 620
-- Email : eurosupport\@xilinx.com
--
-- France Support
-- (Mon-Fri 08:00 to 17:30 GMT)
-- Hotline: +33 1 3463 0100
-- Fax: +44 870 7350 620
-- Email : eurosupport\@xilinx.com
--
-- Germany Support
-- (Mon-Fri 08:00 to 17:30 GMT)
-- Hotline: +49 180 3 60 60 60
-- Fax: +44 870 7350 620
-- Email : eurosupport\@xilinx.com
-- Sweden Support
-- (Mon-Fri 08:00 to 17:30 GMT)
-- Hotline: +46 8 33 14 00
-- Fax: +44 870 7350 620
-- Email : eurosupport\@xilinx.com
--
-- Japan Support
-- (Mon,Tues,Thu,Fri 9:00am -5:00pm ()
-- Wed 9:00am -4:00pm)
-- Hotline: (81)3-3297-9163
-- Fax:: (81)3-3297-0067
-- Email: jhotline\@xilinx.com
-- =================================================
----------------------------------
-- BSDL File for P1149.1 Standard.
----------------------------------
entity XC3S100E_TQ144 is
-- Generic Parameter
generic (PHYSICAL_PIN_MAP : string := "TQ144" );
-- Logical Port Description
port (
DONE: inout bit;
GND: linkage bit_vector (1 to 13);
IPAD100: in bit;
IPAD104: in bit;
IPAD12: in bit;
IPAD13: in bit;
IPAD19: in bit;
IPAD20: in bit;
IPAD23: in bit;
IPAD26: in bit;
IPAD27: in bit;
IPAD3: in bit;
IPAD32: in bit;
IPAD36: in bit;
IPAD41: in bit;
IPAD46: in bit;
IPAD50: in bit;
IPAD57: in bit;
IPAD6: in bit;
IPAD60: in bit;
IPAD66: in bit;
IPAD67: in bit;
IPAD73: in bit;
IPAD74: in bit;
IPAD77: in bit;
IPAD80: in bit;
IPAD81: in bit;
IPAD86: in bit;
IPAD90: in bit;
IPAD95: in bit;
P10: inout bit; -- PAD101
P103: inout bit; -- PAD31
P104: inout bit; -- PAD30
P105: inout bit; -- PAD29
P106: inout bit; -- PAD28
P112: inout bit; -- PAD25
P113: inout bit; -- PAD24
P116: inout bit; -- PAD22
P117: inout bit; -- PAD21
P122: inout bit; -- PAD18
P123: inout bit; -- PAD17
P124: inout bit; -- PAD16
P125: inout bit; -- PAD15
P126: inout bit; -- PAD14
P130: inout bit; -- PAD11
P131: inout bit; -- PAD10
P132: inout bit; -- PAD9
P134: inout bit; -- PAD8
P135: inout bit; -- PAD7
P139: inout bit; -- PAD5
P14: inout bit; -- PAD99
P140: inout bit; -- PAD4
P142: inout bit; -- PAD2
P15: inout bit; -- PAD98
P16: inout bit; -- PAD97
P17: inout bit; -- PAD96
P2: inout bit; -- PAD108
P20: inout bit; -- PAD94
P21: inout bit; -- PAD93
P22: inout bit; -- PAD92
P23: inout bit; -- PAD91
P25: inout bit; -- PAD89
P26: inout bit; -- PAD88
P29: inout bit; -- PAD87
P3: inout bit; -- PAD107
P32: inout bit; -- PAD85
P33: inout bit; -- PAD84
P34: inout bit; -- PAD83
P35: inout bit; -- PAD82
P39: inout bit; -- PAD79
P4: inout bit; -- PAD106
P40: inout bit; -- PAD78
P43: inout bit; -- PAD76
P44: inout bit; -- PAD75
P5: inout bit; -- PAD105
P50: inout bit; -- PAD72
P51: inout bit; -- PAD71
P52: inout bit; -- PAD70
P53: inout bit; -- PAD69
P54: inout bit; -- PAD68
P58: inout bit; -- PAD65
P59: inout bit; -- PAD64
P60: inout bit; -- PAD63
P62: inout bit; -- PAD62
P63: inout bit; -- PAD61
P67: inout bit; -- PAD59
P68: inout bit; -- PAD58
P7: inout bit; -- PAD103
P70: inout bit; -- PAD56
P71: inout bit; -- PAD55
P74: inout bit; -- PAD54
P75: inout bit; -- PAD53
P76: inout bit; -- PAD52
P77: inout bit; -- PAD51
P8: inout bit; -- PAD102
P81: inout bit; -- PAD49
P82: inout bit; -- PAD48
P83: inout bit; -- PAD47
P85: inout bit; -- PAD45
P86: inout bit; -- PAD44
P87: inout bit; -- PAD43
P88: inout bit; -- PAD42
P91: inout bit; -- PAD40
P92: inout bit; -- PAD39
P93: inout bit; -- PAD38
P94: inout bit; -- PAD37
P96: inout bit; -- PAD35
P97: inout bit; -- PAD34
P98: inout bit; -- PAD33
PROG_B: in bit;
PUDC_B: in bit; -- PAD1
TCK: in bit;
TDI: in bit;
TDO: out bit;
TMS: in bit;
VCCAUX: linkage bit_vector (1 to 4);
VCCINT: linkage bit_vector (1 to 4);
VCCO_0: linkage bit_vector (1 to 2);
VCCO_1: linkage bit_vector (1 to 2);
VCCO_2: linkage bit_vector (1 to 3);
VCCO_3: linkage bit_vector (1 to 2)
); --end port list
-- Use Statements
use STD_1149_1_2001.all;
-- Component Conformance Statement(s)
attribute COMPONENT_CONFORMANCE of XC3S100E_TQ144 : entity is
"STD_1149_1_2001";
-- Device Package Pin Mappings
attribute PIN_MAP of XC3S100E_TQ144 : entity is PHYSICAL_PIN_MAP;
constant TQ144: PIN_MAP_STRING:=
"DONE:P72," &
"GND:(P11,P19,P27,P37,P46,P55,P61,P73,P90,P99," &
"P118,P127,P133)," &
"IPAD100:P12," &
"IPAD104:P6," &
"IPAD12:P129," &
"IPAD13:P128," &
"IPAD19:P120," &
"IPAD20:P119," &
"IPAD23:P114," &
"IPAD26:P111," &
"IPAD27:P107," &
"IPAD3:P141," &
"IPAD32:P101," &
"IPAD36:P95," &
"IPAD41:P89," &
"IPAD46:P84," &
"IPAD50:P78," &
"IPAD57:P69," &
"IPAD6:P136," &
"IPAD60:P66," &
"IPAD66:P57," &
"IPAD67:P56," &
"IPAD73:P48," &
"IPAD74:P47," &
"IPAD77:P41," &
"IPAD80:P38," &
"IPAD81:P36," &
"IPAD86:P31," &
"IPAD90:P24," &
"IPAD95:P18," &
"P10:P10," &
"P103:P103," &
"P104:P104," &
"P105:P105," &
"P106:P106," &
"P112:P112," &
"P113:P113," &
"P116:P116," &
"P117:P117," &
"P122:P122," &
"P123:P123," &
"P124:P124," &
"P125:P125," &
"P126:P126," &
"P130:P130," &
"P131:P131," &
"P132:P132," &
"P134:P134," &
"P135:P135," &
"P139:P139," &
"P14:P14," &
"P140:P140," &
"P142:P142," &
"P15:P15," &
"P16:P16," &
"P17:P17," &
"P2:P2," &
"P20:P20," &
"P21:P21," &
"P22:P22," &
"P23:P23," &
"P25:P25," &
"P26:P26," &
"P29:P29," &
"P3:P3," &
"P32:P32," &
"P33:P33," &
"P34:P34," &
"P35:P35," &
"P39:P39," &
"P4:P4," &
"P40:P40," &
"P43:P43," &
"P44:P44," &
"P5:P5," &
"P50:P50," &
"P51:P51," &
"P52:P52," &
"P53:P53," &
"P54:P54," &
"P58:P58," &
"P59:P59," &
"P60:P60," &
"P62:P62," &
"P63:P63," &
"P67:P67," &
"P68:P68," &
"P7:P7," &
"P70:P70," &
"P71:P71," &
"P74:P74," &
"P75:P75," &
"P76:P76," &
"P77:P77," &
"P8:P8," &
"P81:P81," &
"P82:P82," &
"P83:P83," &
"P85:P85," &
"P86:P86," &
"P87:P87," &
"P88:P88," &
"P91:P91," &
"P92:P92," &
"P93:P93," &
"P94:P94," &
"P96:P96," &
"P97:P97," &
"P98:P98," &
"PROG_B:P1," &
"PUDC_B:P143," &
"TCK:P110," &
"TDI:P144," &
"TDO:P109," &
"TMS:P108," &
"VCCAUX:(P30,P65,P102,P137)," &
"VCCINT:(P9,P45,P80,P115)," &
"VCCO_0:(P121,P138)," &
"VCCO_1:(P79,P100)," &
"VCCO_2:(P42,P49,P64)," &
"VCCO_3:(P13,P28)";
-- Scan Port Identification
attribute TAP_SCAN_OUT of TDO : signal is true;
attribute TAP_SCAN_IN of TDI : signal is true;
attribute TAP_SCAN_CLOCK of TCK : signal is (10.0e6, both);
attribute TAP_SCAN_MODE of TMS : signal is true;
-- Compliance-Enable Description
attribute COMPLIANCE_PATTERNS of XC3S100E_TQ144 : entity is
"(PROG_B, PUDC_B) (10)";
-- Instruction Register Description
attribute INSTRUCTION_LENGTH of XC3S100E_TQ144 : entity is 6;
attribute INSTRUCTION_OPCODE of XC3S100E_TQ144 : entity is
"EXTEST (001111)," &
"SAMPLE (000001)," &
"PRELOAD (000001)," & -- Same as SAMPLE
"USER1 (000010)," & -- Not available until after configuration
"USER2 (000011)," & -- Not available until after configuration
"CFG_OUT (000100)," & -- Not available during configuration with another mode.
"CFG_IN (000101)," & -- Not available during configuration with another mode.
"INTEST (000111)," &
"USERCODE (001000)," &
"IDCODE (001001)," &
"HIGHZ (001010)," &
"JPROGRAM (001011)," & -- Not available during configuration with another mode.
"JSTART (001100)," & -- Not available during configuration with another mode.
"JSHUTDOWN (001101)," & -- Not available during configuration with another mode.
"BYPASS (111111)," &
"ISC_ENABLE (010000)," &
"ISC_PROGRAM (010001)," &
"ISC_NOOP (010100)," &
"ISC_READ (010101)," &
"ISC_DISABLE (010110)";
attribute INSTRUCTION_CAPTURE of XC3S100E_TQ144 : entity is
-- Bit 5 is 1 when DONE is released (part of startup sequence)
-- Bit 4 is 1 if house-cleaning is complete
-- Bit 3 is ISC_Enabled
-- Bit 2 is ISC_Done
"XXXX01" ;
attribute INSTRUCTION_PRIVATE of XC3S100E_TQ144 : entity is
"USER1," &
"USER2," &
"CFG_OUT," &
"CFG_IN," &
"JPROGRAM," &
"JSTART," &
"JSHUTDOWN," &
"ISC_ENABLE," &
"ISC_PROGRAM," &
"ISC_NOOP," &
"ISC_READ," &
"ISC_DISABLE";
-- Optional Register Description
attribute IDCODE_REGISTER of XC3S100E_TQ144 : entity is "XXXX" & -- version
"0001110" & -- family
"000010000" & -- array size
"00001001001" & -- manufacturer
"1"; -- required by 1149.1
attribute USERCODE_REGISTER of XC3S100E_TQ144 : entity is "XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX";
-- Register Access Description
attribute REGISTER_ACCESS of XC3S100E_TQ144 : entity is
"BYPASS (HIGHZ, BYPASS)," &
"DEVICE_ID (USERCODE, IDCODE)," &
"BOUNDARY (EXTEST, SAMPLE, PRELOAD, INTEST)";
-- Boundary-Scan Register Description
attribute BOUNDARY_LENGTH of XC3S100E_TQ144 : entity is 272;
attribute BOUNDARY_REGISTER of XC3S100E_TQ144 : entity is
-- cellnum (type, port, function, safe[, ccell, disval, disrslt])
" 271 (BC_2, IPAD27, input, X)," &
" 270 (BC_2, P106, input, X)," & -- PAD28
" 269 (BC_2, P106, output3, X, 268, 1, PULL1)," & -- PAD28
" 268 (BC_2, *, controlr, 1)," &
" 267 (BC_2, P105, input, X)," & -- PAD29
" 266 (BC_2, P105, output3, X, 265, 1, PULL1)," & -- PAD29
" 265 (BC_2, *, controlr, 1)," &
" 264 (BC_2, P104, input, X)," & -- PAD30
" 263 (BC_2, P104, output3, X, 262, 1, PULL1)," & -- PAD30
" 262 (BC_2, *, controlr, 1)," &
" 261 (BC_2, P103, input, X)," & -- PAD31
" 260 (BC_2, P103, output3, X, 259, 1, PULL1)," & -- PAD31
" 259 (BC_2, *, controlr, 1)," &
" 258 (BC_2, IPAD32, input, X)," &
" 257 (BC_2, P98, input, X)," & -- PAD33
" 256 (BC_2, P98, output3, X, 255, 1, PULL1)," & -- PAD33
" 255 (BC_2, *, controlr, 1)," &
" 254 (BC_2, P97, input, X)," & -- PAD34
" 253 (BC_2, P97, output3, X, 252, 1, PULL1)," & -- PAD34
" 252 (BC_2, *, controlr, 1)," &
" 251 (BC_2, P96, input, X)," & -- PAD35
" 250 (BC_2, P96, output3, X, 249, 1, PULL1)," & -- PAD35
" 249 (BC_2, *, controlr, 1)," &
" 248 (BC_2, IPAD36, input, X)," &
" 247 (BC_2, P94, input, X)," & -- PAD37
" 246 (BC_2, P94, output3, X, 245, 1, PULL1)," & -- PAD37
" 245 (BC_2, *, controlr, 1)," &
" 244 (BC_2, P93, input, X)," & -- PAD38
" 243 (BC_2, P93, output3, X, 242, 1, PULL1)," & -- PAD38
" 242 (BC_2, *, controlr, 1)," &
" 241 (BC_2, P92, input, X)," & -- PAD39
" 240 (BC_2, P92, output3, X, 239, 1, PULL1)," & -- PAD39
" 239 (BC_2, *, controlr, 1)," &
" 238 (BC_2, P91, input, X)," & -- PAD40
" 237 (BC_2, P91, output3, X, 236, 1, PULL1)," & -- PAD40
" 236 (BC_2, *, controlr, 1)," &
" 235 (BC_2, IPAD41, input, X)," &
" 234 (BC_2, P88, input, X)," & -- PAD42
" 233 (BC_2, P88, output3, X, 232, 1, PULL1)," & -- PAD42
" 232 (BC_2, *, controlr, 1)," &
" 231 (BC_2, P87, input, X)," & -- PAD43
" 230 (BC_2, P87, output3, X, 229, 1, PULL1)," & -- PAD43
" 229 (BC_2, *, controlr, 1)," &
" 228 (BC_2, P86, input, X)," & -- PAD44
" 227 (BC_2, P86, output3, X, 226, 1, PULL1)," & -- PAD44
" 226 (BC_2, *, controlr, 1)," &
" 225 (BC_2, P85, input, X)," & -- PAD45
" 224 (BC_2, P85, output3, X, 223, 1, PULL1)," & -- PAD45
" 223 (BC_2, *, controlr, 1)," &
" 222 (BC_2, IPAD46, input, X)," &
" 221 (BC_2, P83, input, X)," & -- PAD47
" 220 (BC_2, P83, output3, X, 219, 1, PULL1)," & -- PAD47
" 219 (BC_2, *, controlr, 1)," &
" 218 (BC_2, P82, input, X)," & -- PAD48
" 217 (BC_2, P82, output3, X, 216, 1, PULL1)," & -- PAD48
" 216 (BC_2, *, controlr, 1)," &
" 215 (BC_2, P81, input, X)," & -- PAD49
" 214 (BC_2, P81, output3, X, 213, 1, PULL1)," & -- PAD49
" 213 (BC_2, *, controlr, 1)," &
" 212 (BC_2, IPAD50, input, X)," &
" 211 (BC_2, P77, input, X)," & -- PAD51
" 210 (BC_2, P77, output3, X, 209, 1, PULL1)," & -- PAD51
" 209 (BC_2, *, controlr, 1)," &
" 208 (BC_2, P76, input, X)," & -- PAD52
" 207 (BC_2, P76, output3, X, 206, 1, PULL1)," & -- PAD52
" 206 (BC_2, *, controlr, 1)," &
" 205 (BC_2, P75, input, X)," & -- PAD53
" 204 (BC_2, P75, output3, X, 203, 1, PULL1)," & -- PAD53
" 203 (BC_2, *, controlr, 1)," &
" 202 (BC_2, P74, input, X)," & -- PAD54
" 201 (BC_2, P74, output3, X, 200, 1, PULL1)," & -- PAD54
" 200 (BC_2, *, controlr, 1)," &
" 199 (BC_2, DONE, input, X)," &
" 198 (BC_2, DONE, output3, X, 197, 1, PULL1)," &
" 197 (BC_2, *, controlr, 1)," &
" 196 (BC_2, P71, input, X)," & -- PAD55
" 195 (BC_2, P71, output3, X, 194, 1, PULL1)," & -- PAD55
" 194 (BC_2, *, controlr, 1)," &
" 193 (BC_2, P70, input, X)," & -- PAD56
" 192 (BC_2, P70, output3, X, 191, 1, PULL1)," & -- PAD56
" 191 (BC_2, *, controlr, 1)," &
" 190 (BC_2, IPAD57, input, X)," &
" 189 (BC_2, P68, input, X)," & -- PAD58
" 188 (BC_2, P68, output3, X, 187, 1, PULL1)," & -- PAD58
" 187 (BC_2, *, controlr, 1)," &
" 186 (BC_2, P67, input, X)," & -- PAD59
" 185 (BC_2, P67, output3, X, 184, 1, PULL1)," & -- PAD59
" 184 (BC_2, *, controlr, 1)," &
" 183 (BC_2, IPAD60, input, X)," &
" 182 (BC_2, P63, input, X)," & -- PAD61
" 181 (BC_2, P63, output3, X, 180, 1, PULL1)," & -- PAD61
" 180 (BC_2, *, controlr, 1)," &
" 179 (BC_2, P62, input, X)," & -- PAD62
" 178 (BC_2, P62, output3, X, 177, 1, PULL1)," & -- PAD62
" 177 (BC_2, *, controlr, 1)," &
" 176 (BC_2, P60, input, X)," & -- PAD63
" 175 (BC_2, P60, output3, X, 174, 1, PULL1)," & -- PAD63
" 174 (BC_2, *, controlr, 1)," &
" 173 (BC_2, P59, input, X)," & -- PAD64
" 172 (BC_2, P59, output3, X, 171, 1, PULL1)," & -- PAD64
" 171 (BC_2, *, controlr, 1)," &
" 170 (BC_2, P58, input, X)," & -- PAD65
" 169 (BC_2, P58, output3, X, 168, 1, PULL1)," & -- PAD65
" 168 (BC_2, *, controlr, 1)," &
" 167 (BC_2, IPAD66, input, X)," &
" 166 (BC_2, IPAD67, input, X)," &
" 165 (BC_2, P54, input, X)," & -- PAD68
" 164 (BC_2, P54, output3, X, 163, 1, PULL1)," & -- PAD68
" 163 (BC_2, *, controlr, 1)," &
" 162 (BC_2, P53, input, X)," & -- PAD69
" 161 (BC_2, P53, output3, X, 160, 1, PULL1)," & -- PAD69
" 160 (BC_2, *, controlr, 1)," &
" 159 (BC_2, P52, input, X)," & -- PAD70
" 158 (BC_2, P52, output3, X, 157, 1, PULL1)," & -- PAD70
" 157 (BC_2, *, controlr, 1)," &
" 156 (BC_2, P51, input, X)," & -- PAD71
" 155 (BC_2, P51, output3, X, 154, 1, PULL1)," & -- PAD71
" 154 (BC_2, *, controlr, 1)," &
" 153 (BC_2, P50, input, X)," & -- PAD72
" 152 (BC_2, P50, output3, X, 151, 1, PULL1)," & -- PAD72
" 151 (BC_2, *, controlr, 1)," &
" 150 (BC_2, IPAD73, input, X)," &
" 149 (BC_2, IPAD74, input, X)," &
" 148 (BC_2, P44, input, X)," & -- PAD75
" 147 (BC_2, P44, output3, X, 146, 1, PULL1)," & -- PAD75
" 146 (BC_2, *, controlr, 1)," &
" 145 (BC_2, P43, input, X)," & -- PAD76
" 144 (BC_2, P43, output3, X, 143, 1, PULL1)," & -- PAD76
" 143 (BC_2, *, controlr, 1)," &
" 142 (BC_2, IPAD77, input, X)," &
" 141 (BC_2, P40, input, X)," & -- PAD78
" 140 (BC_2, P40, output3, X, 139, 1, PULL1)," & -- PAD78
" 139 (BC_2, *, controlr, 1)," &
" 138 (BC_2, P39, input, X)," & -- PAD79
" 137 (BC_2, P39, output3, X, 136, 1, PULL1)," & -- PAD79
" 136 (BC_2, *, controlr, 1)," &
" 135 (BC_2, IPAD80, input, X)," &
" 134 (BC_2, IPAD81, input, X)," &
" 133 (BC_2, P35, input, X)," & -- PAD82
" 132 (BC_2, P35, output3, X, 131, 1, PULL1)," & -- PAD82
" 131 (BC_2, *, controlr, 1)," &
" 130 (BC_2, P34, input, X)," & -- PAD83
" 129 (BC_2, P34, output3, X, 128, 1, PULL1)," & -- PAD83
" 128 (BC_2, *, controlr, 1)," &
" 127 (BC_2, P33, input, X)," & -- PAD84
" 126 (BC_2, P33, output3, X, 125, 1, PULL1)," & -- PAD84
" 125 (BC_2, *, controlr, 1)," &
" 124 (BC_2, P32, input, X)," & -- PAD85
" 123 (BC_2, P32, output3, X, 122, 1, PULL1)," & -- PAD85
" 122 (BC_2, *, controlr, 1)," &
" 121 (BC_2, IPAD86, input, X)," &
" 120 (BC_2, P29, input, X)," & -- PAD87
" 119 (BC_2, P29, output3, X, 118, 1, PULL1)," & -- PAD87
" 118 (BC_2, *, controlr, 1)," &
" 117 (BC_2, P26, input, X)," & -- PAD88
" 116 (BC_2, P26, output3, X, 115, 1, PULL1)," & -- PAD88
" 115 (BC_2, *, controlr, 1)," &
" 114 (BC_2, P25, input, X)," & -- PAD89
" 113 (BC_2, P25, output3, X, 112, 1, PULL1)," & -- PAD89
" 112 (BC_2, *, controlr, 1)," &
" 111 (BC_2, IPAD90, input, X)," &
" 110 (BC_2, P23, input, X)," & -- PAD91
" 109 (BC_2, P23, output3, X, 108, 1, PULL1)," & -- PAD91
" 108 (BC_2, *, controlr, 1)," &
" 107 (BC_2, P22, input, X)," & -- PAD92
" 106 (BC_2, P22, output3, X, 105, 1, PULL1)," & -- PAD92
" 105 (BC_2, *, controlr, 1)," &
" 104 (BC_2, P21, input, X)," & -- PAD93
" 103 (BC_2, P21, output3, X, 102, 1, PULL1)," & -- PAD93
" 102 (BC_2, *, controlr, 1)," &
" 101 (BC_2, P20, input, X)," & -- PAD94
" 100 (BC_2, P20, output3, X, 99, 1, PULL1)," & -- PAD94
" 99 (BC_2, *, controlr, 1)," &
" 98 (BC_2, IPAD95, input, X)," &
" 97 (BC_2, P17, input, X)," & -- PAD96
" 96 (BC_2, P17, output3, X, 95, 1, PULL1)," & -- PAD96
" 95 (BC_2, *, controlr, 1)," &
" 94 (BC_2, P16, input, X)," & -- PAD97
" 93 (BC_2, P16, output3, X, 92, 1, PULL1)," & -- PAD97
" 92 (BC_2, *, controlr, 1)," &
" 91 (BC_2, P15, input, X)," & -- PAD98
" 90 (BC_2, P15, output3, X, 89, 1, PULL1)," & -- PAD98
" 89 (BC_2, *, controlr, 1)," &
" 88 (BC_2, P14, input, X)," & -- PAD99
" 87 (BC_2, P14, output3, X, 86, 1, PULL1)," & -- PAD99
" 86 (BC_2, *, controlr, 1)," &
" 85 (BC_2, IPAD100, input, X)," &
" 84 (BC_2, P10, input, X)," & -- PAD101
" 83 (BC_2, P10, output3, X, 82, 1, PULL1)," & -- PAD101
" 82 (BC_2, *, controlr, 1)," &
" 81 (BC_2, P8, input, X)," & -- PAD102
" 80 (BC_2, P8, output3, X, 79, 1, PULL1)," & -- PAD102
" 79 (BC_2, *, controlr, 1)," &
" 78 (BC_2, P7, input, X)," & -- PAD103
" 77 (BC_2, P7, output3, X, 76, 1, PULL1)," & -- PAD103
" 76 (BC_2, *, controlr, 1)," &
" 75 (BC_2, IPAD104, input, X)," &
" 74 (BC_2, P5, input, X)," & -- PAD105
" 73 (BC_2, P5, output3, X, 72, 1, PULL1)," & -- PAD105
" 72 (BC_2, *, controlr, 1)," &
" 71 (BC_2, P4, input, X)," & -- PAD106
" 70 (BC_2, P4, output3, X, 69, 1, PULL1)," & -- PAD106
" 69 (BC_2, *, controlr, 1)," &
" 68 (BC_2, P3, input, X)," & -- PAD107
" 67 (BC_2, P3, output3, X, 66, 1, PULL1)," & -- PAD107
" 66 (BC_2, *, controlr, 1)," &
" 65 (BC_2, P2, input, X)," & -- PAD108
" 64 (BC_2, P2, output3, X, 63, 1, PULL1)," & -- PAD108
" 63 (BC_2, *, controlr, 1)," &
" 62 (BC_2, *, internal, 1)," & -- PROG_B
" 61 (BC_2, *, internal, 1)," & -- PUDC_B
" 60 (BC_2, *, internal, 1)," & -- PUDC_B
" 59 (BC_2, *, internal, 1)," & -- PUDC_B
" 58 (BC_2, P142, input, X)," & -- PAD2
" 57 (BC_2, P142, output3, X, 56, 1, PULL1)," & -- PAD2
" 56 (BC_2, *, controlr, 1)," &
" 55 (BC_2, IPAD3, input, X)," &
" 54 (BC_2, P140, input, X)," & -- PAD4
" 53 (BC_2, P140, output3, X, 52, 1, PULL1)," & -- PAD4
" 52 (BC_2, *, controlr, 1)," &
" 51 (BC_2, P139, input, X)," & -- PAD5
" 50 (BC_2, P139, output3, X, 49, 1, PULL1)," & -- PAD5
" 49 (BC_2, *, controlr, 1)," &
" 48 (BC_2, IPAD6, input, X)," &
" 47 (BC_2, P135, input, X)," & -- PAD7
" 46 (BC_2, P135, output3, X, 45, 1, PULL1)," & -- PAD7
" 45 (BC_2, *, controlr, 1)," &
" 44 (BC_2, P134, input, X)," & -- PAD8
" 43 (BC_2, P134, output3, X, 42, 1, PULL1)," & -- PAD8
" 42 (BC_2, *, controlr, 1)," &
" 41 (BC_2, P132, input, X)," & -- PAD9
" 40 (BC_2, P132, output3, X, 39, 1, PULL1)," & -- PAD9
" 39 (BC_2, *, controlr, 1)," &
" 38 (BC_2, P131, input, X)," & -- PAD10
" 37 (BC_2, P131, output3, X, 36, 1, PULL1)," & -- PAD10
" 36 (BC_2, *, controlr, 1)," &
" 35 (BC_2, P130, input, X)," & -- PAD11
" 34 (BC_2, P130, output3, X, 33, 1, PULL1)," & -- PAD11
" 33 (BC_2, *, controlr, 1)," &
" 32 (BC_2, IPAD12, input, X)," &
" 31 (BC_2, IPAD13, input, X)," &
" 30 (BC_2, P126, input, X)," & -- PAD14
" 29 (BC_2, P126, output3, X, 28, 1, PULL1)," & -- PAD14
" 28 (BC_2, *, controlr, 1)," &
" 27 (BC_2, P125, input, X)," & -- PAD15
" 26 (BC_2, P125, output3, X, 25, 1, PULL1)," & -- PAD15
" 25 (BC_2, *, controlr, 1)," &
" 24 (BC_2, P124, input, X)," & -- PAD16
" 23 (BC_2, P124, output3, X, 22, 1, PULL1)," & -- PAD16
" 22 (BC_2, *, controlr, 1)," &
" 21 (BC_2, P123, input, X)," & -- PAD17
" 20 (BC_2, P123, output3, X, 19, 1, PULL1)," & -- PAD17
" 19 (BC_2, *, controlr, 1)," &
" 18 (BC_2, P122, input, X)," & -- PAD18
" 17 (BC_2, P122, output3, X, 16, 1, PULL1)," & -- PAD18
" 16 (BC_2, *, controlr, 1)," &
" 15 (BC_2, IPAD19, input, X)," &
" 14 (BC_2, IPAD20, input, X)," &
" 13 (BC_2, P117, input, X)," & -- PAD21
" 12 (BC_2, P117, output3, X, 11, 1, PULL1)," & -- PAD21
" 11 (BC_2, *, controlr, 1)," &
" 10 (BC_2, P116, input, X)," & -- PAD22
" 9 (BC_2, P116, output3, X, 8, 1, PULL1)," & -- PAD22
" 8 (BC_2, *, controlr, 1)," &
" 7 (BC_2, IPAD23, input, X)," &
" 6 (BC_2, P113, input, X)," & -- PAD24
" 5 (BC_2, P113, output3, X, 4, 1, PULL1)," & -- PAD24
" 4 (BC_2, *, controlr, 1)," &
" 3 (BC_2, P112, input, X)," & -- PAD25
" 2 (BC_2, P112, output3, X, 1, 1, PULL1)," & -- PAD25
" 1 (BC_2, *, controlr, 1)," &
" 0 (BC_2, IPAD26, input, X)";
-- Design Warning Section
attribute DESIGN_WARNING of XC3S100E_TQ144 : entity is
"This is a preliminary BSDL file which has not been verified." &
"This BSDL file must be modified by the FPGA designer in order to" &
"reflect post-configuration behavior (if any)." &
"To avoid losing the current configuration, the PROG_B should be" &
"kept high. If the PROG_B pin goes low by any means," &
"the configuration will be cleared." &
"PROG_B can only be captured, not updated." &
"The value at the pin is always used by the device." &
"PUDC_B can be captured and updated." &
"The value at the pin is always used by the device" &
"before configuration is done." &
"During pre-configuration, the disable result of a 3-stated" &
"I/O in this file corresponds to PUDC_B being low" &
"or during EXTEST instruction." &
"When PUDC_B is high AND during SAMPLE instruction, change" &
"all PULL1s to PULL0s." &
"After configuration, the disable result only depends on" &
"the individual IO configuration setting." &
"In EXTEST, output and tristate values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"In INTEST, the pin input values are not captured in the" &
"Capture-DR state - those register cells are unchanged." &
"The output and tristate capture values are not valid until after" &
"the device is configured." &
"The tristate control value is not captured properly when" &
"GTS is activated.";
end XC3S100E_TQ144;