Subversion Repositories sockit_owm

<?xml version="1.0" encoding="UTF-8"?>
<system name="soc">
 <parameter name="bonusData"><![CDATA[bonusData 
{
   element jtag_uart.avalon_jtag_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206784";
         type = "long";
      }
   }
   element cfi_flash
   {
      datum _sortIndex
      {
         value = "4";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element clk
   {
      datum _sortIndex
      {
         value = "11";
         type = "int";
      }
   }
   element sysid.control_slave
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206912";
         type = "long";
      }
   }
   element cpu
   {
      datum _sortIndex
      {
         value = "0";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "1";
         type = "boolean";
      }
   }
   element epcs_flash.epcs_control_port
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25204736";
         type = "long";
      }
   }
   element epcs_flash
   {
      datum _sortIndex
      {
         value = "1";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element cpu.jtag_debug_module
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25202688";
         type = "long";
      }
   }
   element jtag_uart
   {
      datum _sortIndex
      {
         value = "6";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element onchip_ram
   {
      datum _sortIndex
      {
         value = "2";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element onewire
   {
      datum _sortIndex
      {
         value = "12";
         type = "int";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element pio_7seg
   {
      datum _sortIndex
      {
         value = "8";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{output_language=VERILOG, output_directory=/home/izi/Workplace/fpga-hdl/DE1/DE1_soc_nios2}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element pio_ledg
   {
      datum _sortIndex
      {
         value = "9";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element pio_ledr
   {
      datum _sortIndex
      {
         value = "10";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element sdram.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "8388608";
         type = "long";
      }
   }
   element timer.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206944";
         type = "long";
      }
   }
   element pio_7seg.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206848";
         type = "long";
      }
   }
   element onchip_ram.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25182208";
         type = "long";
      }
   }
   element pio_ledg.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206864";
         type = "long";
      }
   }
   element onewire.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
   }
   element uart.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206816";
         type = "long";
      }
   }
   element cfi_flash.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "20971520";
         type = "long";
      }
   }
   element pio_ledr.s1
   {
      datum _lockedAddress
      {
         value = "1";
         type = "boolean";
      }
      datum baseAddress
      {
         value = "25206880";
         type = "long";
      }
   }
   element sdram
   {
      datum _sortIndex
      {
         value = "5";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element soc
   {
   }
   element sysid
   {
      datum _sortIndex
      {
         value = "13";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element timer
   {
      datum _sortIndex
      {
         value = "14";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element tri_state_bridge_flash
   {
      datum _sortIndex
      {
         value = "3";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
   element uart
   {
      datum _sortIndex
      {
         value = "7";
         type = "int";
      }
      datum megawizard_uipreferences
      {
         value = "{}";
         type = "String";
      }
      datum sopceditor_expanded
      {
         value = "0";
         type = "boolean";
      }
   }
}
]]></parameter>
 <parameter name="deviceFamily" value="CYCLONEII" />
 <parameter name="fabricMode" value="SOPC" />
 <parameter name="generateLegacySim" value="false" />
 <parameter name="globalResetBus" value="true" />
 <parameter name="hdlLanguage" value="VERILOG" />
 <parameter name="projectName" value="DE1_soc_nios2.qpf" />
 <parameter name="sopcBorderPoints" value="true" />
 <parameter name="systemHash" value="30150066089" />
 <parameter name="timeStamp" value="1294693433376" />
 <module kind="clock_source" version="10.0" enabled="1" name="clk">
  <parameter name="clockFrequency" value="24000000" />
  <parameter name="clockFrequencyKnown" value="true" />
  <parameter name="inputClockFrequency" value="0" />
 </module>
 <module kind="altera_nios2" version="10.0" enabled="1" name="cpu">
  <parameter name="userDefinedSettings" value="" />
  <parameter name="setting_showUnpublishedSettings" value="false" />
  <parameter name="setting_showInternalSettings" value="false" />
  <parameter name="setting_shadowRegisterSets" value="0" />
  <parameter name="setting_preciseSlaveAccessErrorException" value="false" />
  <parameter name="setting_preciseIllegalMemAccessException" value="false" />
  <parameter name="setting_preciseDivisionErrorException" value="false" />
  <parameter name="setting_performanceCounter" value="false" />
  <parameter name="setting_perfCounterWidth" value="_32" />
  <parameter name="setting_interruptControllerType" value="Internal" />
  <parameter name="setting_illegalMemAccessDetection" value="false" />
  <parameter name="setting_illegalInstructionsTrap" value="false" />
  <parameter name="setting_fullWaveformSignals" value="false" />
  <parameter name="setting_extraExceptionInfo" value="false" />
  <parameter name="setting_exportPCB" value="false" />
  <parameter name="setting_debugSimGen" value="false" />
  <parameter name="setting_clearXBitsLDNonBypass" value="true" />
  <parameter name="setting_branchPredictionType" value="Automatic" />
  <parameter name="setting_bit31BypassDCache" value="true" />
  <parameter name="setting_bigEndian" value="false" />
  <parameter name="setting_bhtPtrSz" value="_8" />
  <parameter name="setting_bhtIndexPcOnly" value="false" />
  <parameter name="setting_avalonDebugPortPresent" value="false" />
  <parameter name="setting_alwaysEncrypt" value="true" />
  <parameter name="setting_allowFullAddressRange" value="false" />
  <parameter name="setting_activateTrace" value="true" />
  <parameter name="setting_activateTestEndChecker" value="false" />
  <parameter name="setting_activateMonitors" value="true" />
  <parameter name="setting_activateModelChecker" value="false" />
  <parameter name="setting_HDLSimCachesCleared" value="true" />
  <parameter name="setting_HBreakTest" value="false" />
  <parameter name="resetSlave" value="onchip_ram.s1" />
  <parameter name="resetOffset" value="0" />
  <parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
  <parameter name="muldiv_divider" value="false" />
  <parameter name="mpu_useLimit" value="false" />
  <parameter name="mpu_numOfInstRegion" value="8" />
  <parameter name="mpu_numOfDataRegion" value="8" />
  <parameter name="mpu_minInstRegionSize" value="_12" />
  <parameter name="mpu_minDataRegionSize" value="_12" />
  <parameter name="mpu_enabled" value="false" />
  <parameter name="mmu_uitlbNumEntries" value="_4" />
  <parameter name="mmu_udtlbNumEntries" value="_6" />
  <parameter name="mmu_tlbPtrSz" value="_7" />
  <parameter name="mmu_tlbNumWays" value="_16" />
  <parameter name="mmu_processIDNumBits" value="_8" />
  <parameter name="mmu_enabled" value="false" />
  <parameter name="mmu_autoAssignTlbPtrSz" value="true" />
  <parameter name="mmu_TLBMissExcSlave" value="" />
  <parameter name="mmu_TLBMissExcOffset" value="0" />
  <parameter name="manuallyAssignCpuID" value="false" />
  <parameter name="internalIrqMaskSystemInfo" value="31" />
  <parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x800000' end='0x1000000' /><slave name='cfi_flash.s1' start='0x1400000' end='0x1800000' /><slave name='onchip_ram.s1' start='0x1804000' end='0x1805000' /><slave name='cpu.jtag_debug_module' start='0x1809000' end='0x1809800' /><slave name='epcs_flash.epcs_control_port' start='0x1809800' end='0x180A000' /></address-map>]]></parameter>
  <parameter name="instAddrWidth" value="25" />
  <parameter name="impl" value="Tiny" />
  <parameter name="icache_size" value="_4096" />
  <parameter name="icache_ramBlockType" value="Automatic" />
  <parameter name="icache_numTCIM" value="_0" />
  <parameter name="icache_burstType" value="None" />
  <parameter name="exceptionSlave" value="onchip_ram.s1" />
  <parameter name="exceptionOffset" value="32" />
  <parameter name="deviceFeaturesSystemInfo">M512_MEMORY 0 M4K_MEMORY 1 M9K_MEMORY 0 M20K_MEMORY 0 M144K_MEMORY 0 MRAM_MEMORY 0 MLAB_MEMORY 0 ESB 0 EPCS 1 DSP 0 EMUL 1 HARDCOPY 0 LVDS_IO 0 ADDRESS_STALL 1 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 DSP_SHIFTER_BLOCK 0</parameter>
  <parameter name="deviceFamilyName" value="Cyclone II" />
  <parameter name="debug_triggerArming" value="true" />
  <parameter name="debug_level" value="Level1" />
  <parameter name="debug_jtagInstanceID" value="0" />
  <parameter name="debug_embeddedPLL" value="true" />
  <parameter name="debug_debugReqSignals" value="false" />
  <parameter name="debug_assignJtagInstanceID" value="false" />
  <parameter name="debug_OCIOnchipTrace" value="_128" />
  <parameter name="dcache_size" value="_2048" />
  <parameter name="dcache_ramBlockType" value="Automatic" />
  <parameter name="dcache_omitDataMaster" value="false" />
  <parameter name="dcache_numTCDM" value="_0" />
  <parameter name="dcache_lineSize" value="_32" />
  <parameter name="dcache_bursts" value="false" />
  <parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='onewire.s1' start='0x180A70' end='0x180A78' /><slave name='sdram.s1' start='0x800000' end='0x1000000' /><slave name='cfi_flash.s1' start='0x1400000' end='0x1800000' /><slave name='onchip_ram.s1' start='0x1804000' end='0x1805000' /><slave name='cpu.jtag_debug_module' start='0x1809000' end='0x1809800' /><slave name='epcs_flash.epcs_control_port' start='0x1809800' end='0x180A000' /><slave name='jtag_uart.avalon_jtag_slave' start='0x180A000' end='0x180A008' /><slave name='uart.s1' start='0x180A020' end='0x180A040' /><slave name='pio_7seg.s1' start='0x180A040' end='0x180A050' /><slave name='pio_ledg.s1' start='0x180A050' end='0x180A060' /><slave name='pio_ledr.s1' start='0x180A060' end='0x180A070' /><slave name='sysid.control_slave' start='0x180A080' end='0x180A088' /><slave name='timer.s1' start='0x180A0A0' end='0x180A0C0' /></address-map>]]></parameter>
  <parameter name="dataAddrWidth" value="25" />
  <parameter name="cpuReset" value="false" />
  <parameter name="cpuID" value="0" />
  <parameter name="clockFrequency" value="24000000" />
  <parameter name="breakSlave">cpu.jtag_debug_module</parameter>
  <parameter name="breakOffset" value="32" />
 </module>
 <module
   kind="altera_avalon_jtag_uart"
   version="10.0"
   enabled="1"
   name="jtag_uart">
  <parameter name="allowMultipleConnections" value="false" />
  <parameter name="hubInstanceID" value="0" />
  <parameter name="readBufferDepth" value="16" />
  <parameter name="readIRQThreshold" value="8" />
  <parameter name="simInputCharacterStream" value="" />
  <parameter name="simInteractiveOptions">INTERACTIVE_ASCII_OUTPUT</parameter>
  <parameter name="useRegistersForReadBuffer" value="true" />
  <parameter name="useRegistersForWriteBuffer" value="true" />
  <parameter name="useRelativePathForSimFile" value="false" />
  <parameter name="writeBufferDepth" value="16" />
  <parameter name="writeIRQThreshold" value="8" />
 </module>
 <module kind="altera_avalon_uart" version="10.0" enabled="1" name="uart">
  <parameter name="baud" value="115200" />
  <parameter name="clockRate" value="24000000" />
  <parameter name="dataBits" value="8" />
  <parameter name="fixedBaud" value="true" />
  <parameter name="parity" value="NONE" />
  <parameter name="simCharStream" value="" />
  <parameter name="simInteractiveInputEnable" value="false" />
  <parameter name="simInteractiveOutputEnable" value="false" />
  <parameter name="simTrueBaud" value="false" />
  <parameter name="stopBits" value="1" />
  <parameter name="syncRegDepth" value="2" />
  <parameter name="useCtsRts" value="false" />
  <parameter name="useEopRegister" value="false" />
  <parameter name="useRelativePathForSimFile" value="false" />
 </module>
 <module
   kind="altera_avalon_onchip_memory2"
   version="10.0"
   enabled="1"
   name="onchip_ram">
  <parameter name="allowInSystemMemoryContentEditor" value="false" />
  <parameter name="blockType" value="AUTO" />
  <parameter name="dataWidth" value="32" />
  <parameter name="deviceFamily" value="Cyclone II" />
  <parameter name="dualPort" value="false" />
  <parameter name="initMemContent" value="true" />
  <parameter name="initializationFileName" value="onchip_ram" />
  <parameter name="instanceID" value="NONE" />
  <parameter name="memorySize" value="4096" />
  <parameter name="readDuringWriteMode" value="DONT_CARE" />
  <parameter name="simAllowMRAMContentsFile" value="false" />
  <parameter name="slave1Latency" value="1" />
  <parameter name="slave2Latency" value="1" />
  <parameter name="useNonDefaultInitFile" value="false" />
  <parameter name="useShallowMemBlocks" value="false" />
  <parameter name="writable" value="true" />
 </module>
 <module
   kind="altera_avalon_new_sdram_controller"
   version="10.0"
   enabled="1"
   name="sdram">
  <parameter name="TAC" value="5.5" />
  <parameter name="TMRD" value="3" />
  <parameter name="TRCD" value="20.0" />
  <parameter name="TRFC" value="70.0" />
  <parameter name="TRP" value="20.0" />
  <parameter name="TWR" value="14.0" />
  <parameter name="casLatency" value="3" />
  <parameter name="clockRate" value="24000000" />
  <parameter name="columnWidth" value="8" />
  <parameter name="dataWidth" value="16" />
  <parameter name="generateSimulationModel" value="true" />
  <parameter name="initNOPDelay" value="0.0" />
  <parameter name="initRefreshCommands" value="2" />
  <parameter name="masteredTristateBridgeSlave" value="" />
  <parameter name="model" value="custom" />
  <parameter name="numberOfBanks" value="4" />
  <parameter name="numberOfChipSelects" value="1" />
  <parameter name="pinsSharedViaTriState" value="false" />
  <parameter name="powerUpDelay" value="100.0" />
  <parameter name="refreshPeriod" value="15.625" />
  <parameter name="registerDataIn" value="true" />
  <parameter name="rowWidth" value="12" />
 </module>
 <module kind="altera_avalon_pio" version="10.0" enabled="1" name="pio_7seg">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="24000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="32" />
 </module>
 <module kind="altera_avalon_pio" version="10.0" enabled="1" name="pio_ledg">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="24000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="8" />
 </module>
 <module kind="altera_avalon_pio" version="10.0" enabled="1" name="pio_ledr">
  <parameter name="bitClearingEdgeCapReg" value="false" />
  <parameter name="bitModifyingOutReg" value="false" />
  <parameter name="captureEdge" value="false" />
  <parameter name="clockRate" value="24000000" />
  <parameter name="direction" value="Output" />
  <parameter name="edgeType" value="RISING" />
  <parameter name="generateIRQ" value="false" />
  <parameter name="irqType" value="LEVEL" />
  <parameter name="resetValue" value="0" />
  <parameter name="simDoTestBenchWiring" value="false" />
  <parameter name="simDrivenValue" value="0" />
  <parameter name="width" value="10" />
 </module>
 <module
   kind="altera_avalon_epcs_flash_controller"
   version="10.0"
   enabled="1"
   name="epcs_flash">
  <parameter name="autoSelectASMIAtom" value="true" />
  <parameter name="deviceFamilyString" value="Cyclone II" />
  <parameter name="useASMIAtom" value="true" />
 </module>
 <module
   kind="altera_avalon_cfi_flash"
   version="10.0"
   enabled="1"
   name="cfi_flash">
  <parameter name="addressWidth" value="22" />
  <parameter name="clockRate" value="24000000" />
  <parameter name="corePreset" value="CUSTOM" />
  <parameter name="dataWidth" value="8" />
  <parameter name="holdTime" value="0" />
  <parameter name="setupTime" value="90" />
  <parameter name="sharedPorts" value="" />
  <parameter name="timingUnits" value="NS" />
  <parameter name="waitTime" value="0" />
 </module>
 <module
   kind="altera_avalon_tri_state_bridge"
   version="10.0"
   enabled="1"
   name="tri_state_bridge_flash">
  <parameter name="registerIncomingSignals" value="true" />
 </module>
 <module kind="altera_avalon_sysid" version="10.0" enabled="1" name="sysid" />
 <module kind="altera_avalon_timer" version="10.0" enabled="1" name="timer">
  <parameter name="alwaysRun" value="false" />
  <parameter name="counterSize" value="32" />
  <parameter name="fixedPeriod" value="false" />
  <parameter name="period" value="1" />
  <parameter name="periodUnits" value="MSEC" />
  <parameter name="resetOutput" value="false" />
  <parameter name="snapshot" value="true" />
  <parameter name="systemFrequency" value="24000000" />
  <parameter name="timeoutPulseOutput" value="false" />
  <parameter name="timerPreset" value="CUSTOM" />
 </module>
 <module kind="sockit_owm" version="1.3" enabled="1" name="onewire">
  <parameter name="OVD_E" value="true" />
  <parameter name="CDR_E" value="false" />
  <parameter name="BDW" value="32" />
  <parameter name="BAW" value="1" />
  <parameter name="OWN" value="2" />
  <parameter name="BTP_N" value="5.0" />
  <parameter name="BTP_O" value="1.0" />
  <parameter name="F_CLK" value="24000000" />
 </module>
 <connection kind="clock" version="10.0" start="clk.clk" end="cpu.clk" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="cpu.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01809000" />
 </connection>
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="cpu.jtag_debug_module">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01809000" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="jtag_uart.clk" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="jtag_uart.avalon_jtag_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a000" />
 </connection>
 <connection kind="interrupt" version="10.0" start="cpu.d_irq" end="jtag_uart.irq">
  <parameter name="irqNumber" value="1" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="uart.clk" />
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="uart.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a020" />
 </connection>
 <connection kind="interrupt" version="10.0" start="cpu.d_irq" end="uart.irq">
  <parameter name="irqNumber" value="2" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="onchip_ram.clk1" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="onchip_ram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01804000" />
 </connection>
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="onchip_ram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01804000" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="sdram.clk" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00800000" />
 </connection>
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="sdram.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00800000" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="pio_7seg.clk" />
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="pio_7seg.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a040" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="pio_ledg.clk" />
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="pio_ledg.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a050" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="pio_ledr.clk" />
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="pio_ledr.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a060" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="epcs_flash.clk" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="epcs_flash.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01809800" />
 </connection>
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="epcs_flash.epcs_control_port">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01809800" />
 </connection>
 <connection
   kind="interrupt"
   version="10.0"
   start="cpu.d_irq"
   end="epcs_flash.irq">
  <parameter name="irqNumber" value="0" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="cfi_flash.clk" />
 <connection
   kind="clock"
   version="10.0"
   start="clk.clk"
   end="tri_state_bridge_flash.clk" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.instruction_master"
   end="tri_state_bridge_flash.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="tri_state_bridge_flash.avalon_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0000" />
 </connection>
 <connection
   kind="avalon_tristate"
   version="10.0"
   start="tri_state_bridge_flash.tristate_master"
   end="cfi_flash.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x01400000" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="sysid.clk" />
 <connection
   kind="avalon"
   version="6.1"
   start="cpu.data_master"
   end="sysid.control_slave">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a080" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="timer.clk" />
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="timer.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x0180a0a0" />
 </connection>
 <connection kind="interrupt" version="10.0" start="cpu.d_irq" end="timer.irq">
  <parameter name="irqNumber" value="4" />
 </connection>
 <connection kind="clock" version="10.0" start="clk.clk" end="onewire.clock_reset" />
 <connection kind="avalon" version="6.1" start="cpu.data_master" end="onewire.s1">
  <parameter name="arbitrationPriority" value="1" />
  <parameter name="baseAddress" value="0x00180a70" />
 </connection>
 <connection kind="interrupt" version="10.0" start="cpu.d_irq" end="onewire.irq">
  <parameter name="irqNumber" value="3" />
 </connection>
</system>