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[/] [spacewiresystemc/] [trunk/] [altera_work/] [spw_fifo_ulight/] [db/] [spw_fifo_ulight.smp_dump.txt] - Rev 40
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State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:counter_rx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:counter_tx_fifo_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fsm_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:clock_sel_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:data_info_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_tx_ready_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_tx_enable_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_tx_data_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_empty_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_full_tx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:write_en_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:write_data_fifo_tx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:link_disable_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:auto_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:link_start_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_empty_rx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:fifo_full_rx_status_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:data_read_en_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:data_flag_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_ready_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:timecode_rx_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_mm_interconnect_0:mm_interconnect_0|altera_merlin_burst_adapter:led_pio_test_s1_burst_adapter|altera_merlin_burst_adapter_13_1:altera_merlin_burst_adapter_13_1.burst_adapter|stateName state.ST_IDLE state.ST_UNCOMP_WR_SUBBURST state.ST_UNCOMP_TRANS state.ST_COMP_TRANSstate.ST_IDLE 0 0 0 0state.ST_COMP_TRANS 1 0 0 1state.ST_UNCOMP_TRANS 1 0 1 0state.ST_UNCOMP_WR_SUBBURST 1 1 0 0State Machine - |SPW_ULIGHT_FIFO|detector_tokens:m_x|state_data_processName state_data_process.01state_data_process.00 0state_data_process.01 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|fifo_rx:rx_data|state_open_slotName state_open_slot.00 state_open_slot.10 state_open_slot.01state_open_slot.00 0 0 0state_open_slot.01 1 0 1state_open_slot.10 1 1 0State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|fifo_rx:rx_data|state_data_writeName state_data_write.00 state_data_write.10 state_data_write.01state_data_write.00 0 0 0state_data_write.01 1 0 1state_data_write.10 1 1 0State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|fifo_rx:rx_data|state_data_readName state_data_read.00 state_data_read.10 state_data_read.01state_data_read.00 0 0 0state_data_read.01 1 0 1state_data_read.10 1 1 0State Machine - |SPW_ULIGHT_FIFO|ulight_fifo:u0|ulight_fifo_pll_0:pll_0|altera_pll:altera_pll_i|dps_extra_kick:dps_extra_inst|dps_current_stateName dps_current_state.PHASE_DONE_LOW_0 dps_current_state.PHASE_DONE_LOW_4 dps_current_state.PHASE_DONE_LOW_3 dps_current_state.PHASE_DONE_LOW_2 dps_current_state.PHASE_DONE_LOW_1 dps_current_state.PHASE_DONE_HIGHdps_current_state.PHASE_DONE_HIGH 0 0 0 0 0 0dps_current_state.PHASE_DONE_LOW_1 0 0 0 0 1 1dps_current_state.PHASE_DONE_LOW_2 0 0 0 1 0 1dps_current_state.PHASE_DONE_LOW_3 0 0 1 0 0 1dps_current_state.PHASE_DONE_LOW_4 0 1 0 0 0 1dps_current_state.PHASE_DONE_LOW_0 1 0 0 0 0 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|fifo_tx:tx_data|state_data_readName state_data_read.11 state_data_read.10 state_data_read.01 state_data_read.00state_data_read.00 0 0 0 0state_data_read.01 0 0 1 1state_data_read.10 0 1 0 1state_data_read.11 1 0 0 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_fsm_m:tx_fsm|state_txName state_tx.tx_spw_time_code_c state_tx.tx_spw_data_c_0 state_tx.tx_spw_data_c state_tx.tx_spw_fct_c state_tx.tx_spw_null_c state_tx.tx_spw_fct state_tx.tx_spw_null state_tx.tx_spw_startstate_tx.tx_spw_start 0 0 0 0 0 0 0 0state_tx.tx_spw_null 0 0 0 0 0 0 1 1state_tx.tx_spw_fct 0 0 0 0 0 1 0 1state_tx.tx_spw_null_c 0 0 0 0 1 0 0 1state_tx.tx_spw_fct_c 0 0 0 1 0 0 0 1state_tx.tx_spw_data_c 0 0 1 0 0 0 0 1state_tx.tx_spw_data_c_0 0 1 0 0 0 0 0 1state_tx.tx_spw_time_code_c 1 0 0 0 0 0 0 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_fsm_m:tx_fsm|tx_fct_send:tx_fct_snd|state_fct_sendName state_fct_send.001state_fct_send.000 0state_fct_send.001 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_fsm_m:tx_fsm|tx_fct_send:tx_fct_snd|state_fct_send_pName state_fct_send_p.000 state_fct_send_p.010 state_fct_send_p.001state_fct_send_p.001 0 0 0state_fct_send_p.000 1 0 1state_fct_send_p.010 0 1 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_fsm_m:tx_fsm|tx_fct_counter:tx_fct_cnt|state_fct_pName state_fct_p.011 state_fct_p.010 state_fct_p.001 state_fct_p.000 state_fct_p.100state_fct_p.000 0 0 0 0 0state_fct_p.001 0 0 1 1 0state_fct_p.010 0 1 0 1 0state_fct_p.011 1 0 0 1 0state_fct_p.100 0 0 0 1 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|fifo_tx:tx_data|state_data_writeName state_data_write.00 state_data_write.10 state_data_write.01state_data_write.00 0 0 0state_data_write.01 1 0 1state_data_write.10 1 1 0State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|TX_SPW:TX|tx_fsm_m:tx_fsm|tx_fct_counter:tx_fct_cnt|state_fct_receiveName state_fct_receive.011 state_fct_receive.010 state_fct_receive.001 state_fct_receive.000 state_fct_receive.100state_fct_receive.000 0 0 0 0 0state_fct_receive.001 0 0 1 1 0state_fct_receive.010 0 1 0 1 0state_fct_receive.011 1 0 0 1 0state_fct_receive.100 0 0 0 1 1State Machine - |SPW_ULIGHT_FIFO|spw_ulight_con_top_x:A_SPW_TOP|top_spw_ultra_light:SPW|FSM_SPW:FSM|state_fsmName state_fsm.error_reset state_fsm.run state_fsm.connecting state_fsm.started state_fsm.ready state_fsm.error_waitstate_fsm.error_reset 0 0 0 0 0 0state_fsm.error_wait 1 0 0 0 0 1state_fsm.ready 1 0 0 0 1 0state_fsm.started 1 0 0 1 0 0state_fsm.connecting 1 0 1 0 0 0state_fsm.run 1 1 0 0 0 0