Subversion Repositories spi_boot

README for the spi_boot core
============================
Version: $Date: 2005-02-13 18:45:41 $


Description
-----------


Integration
-----------


Verification
------------

The spi_boot core comes with a simple testbench that simulates an SD/MMC
card. All four implementations of the core are verified there in parallel
while transferring the data for several sets.
You should normally not need to run the testbench. But in case you modified
the VHDL code the testbench gives some hints if the design has been broken.


Directory Structure
-------------------

The core's directory structure follows the proposal of OpenCores.org.

spi_boot
 |
 \--+-- rtl
    |    |
    |    \-- vhdl           : VHDL code containing the RTL description
    |                         of the core.
    |
    +-- bench
    |    |
    |    \-- vhdl           : VHDL testbench code.
    |
    \-- sim
         |
         \-- rtl_sim        : Directory for running simulations.


Compiling the VHDL Code
-----------------------

VHDL compilation and simulation tasks take place inside in sim/rtl_sim
directory. The project setup supports only the GHDL simulator (see
http://ghdl.free.fr).

To compile the code simply type at the shell

$ make

This should result in a file called tb_behav_c0 which can be executed as any
other executable.

The basic simple sequence list can be found in COMPILE_LIST. This can be
useful to quickly set up the analyze stage of any compiler or
synthesizer. Especially when synthesizing the code, you want to skip the VHDL
configurations in *-c.vhd and everything below the bench/ directory.


References
----------

  * SanDisk SD Card Product Manual
    http://www.sandisk.com/pdf/oem/ProdManualSDCardv1.9.pdf

  * SanDisk MMC Product Manual
    http://www.sandisk.com/pdf/oem/manual-rs-mmcv1.0.pdf

  * Toshiba SD Card Specification
    http://i.cmpnet.com/chipcenter/memory/images/prod055.pdf