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[/] [sport/] [trunk/] [syn/] [xilinx/] [ise/] [sport_top/] [planAhead_run_2/] [sport_top.ppr] - Rev 7

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<?xml version="1.0"?>
<!--Product Version: PlanAhead v14.7 (64-bit)-->
<Project Version="4" Minor="36">
        <FileSet Dir="sources_1" File="fileset.xml"/>
        <FileSet Dir="constrs_1" File="fileset.xml"/>
        <FileSet Dir="sim_1" File="fileset.xml"/>
        <RunSet Dir="runs" File="runs.xml"/>
        <DefaultLaunch Dir="$PRUNDIR"/>
        <DefaultPromote Dir="$PROMOTEDIR"/>
        <Config>
                <Option Name="Id" Val="5101e10fabe14ea789ef975fb1638084"/>
                <Option Name="Part" Val="xc3s700anfgg484-4"/>
                <Option Name="CompiledLibDir" Val="$PCACHEDIR/compile_simlib"/>
                <Option Name="TargetLanguage" Val="Verilog"/>
                <Option Name="TargetSimulator" Val="ISim"/>
                <Option Name="Board" Val=""/>
                <Option Name="SourceMgmtMode" Val="All"/>
                <Option Name="ActiveSimSet" Val="sim_1"/>
                <Option Name="CxlOverwriteLibs" Val="1"/>
                <Option Name="CxlFuncsim" Val="1"/>
                <Option Name="CxlTimesim" Val="1"/>
                <Option Name="CxlCore" Val="1"/>
                <Option Name="CxlEdk" Val="0"/>
                <Option Name="CxlExcludeCores" Val="1"/>
                <Option Name="CxlExcludeSubLibs" Val="0"/>
        </Config>
</Project>

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