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[/] [sport/] [trunk/] [syn/] [xilinx/] [ise/] [sport_top/] [sport_top.unroutes] - Rev 7

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Release 14.7 - par P.20131013 (nt64)
Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.

Fri Feb 20 14:09:24 2015

All signals are completely routed.

WARNING:ParHelpers:361 - There are 2 loadless signals in this design. This design will cause Bitgen to issue DRC
   warnings.

   DRxPRI_IBUF
   DRxSEC_IBUF

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