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#
# Copyright 2015, Sinclair R.F., Inc.
#
# Test bench for servo_motor peripheral.
#

ARCHITECTURE    core/9x8 Verilog
ASSEMBLY        tb_servo_motor.s

INSTRUCTION     256
DATA_STACK      16
RETURN_STACK    16

CONSTANT        C_CLK_FREQ_HZ   8_000_000

PORTCOMMENT     3 linked servo motor
PERIPHERAL      servo_motor     outport=O_triple_0      \
                                outsignal=o_triple_0    \
                                freq_hz=C_CLK_FREQ_HZ   \
                                min_width=1000us        \
                                max_width=1500us        \
                                default_width=1250us    \
                                period=5ms              \
                                inperiod=I_triple
PERIPHERAL      servo_motor     outport=O_triple_1      \
                                outsignal=o_triple_1    \
                                freq_hz=C_CLK_FREQ_HZ   \
                                min_width=1000us        \
                                max_width=1500us        \
                                sync=o_triple_0
PERIPHERAL      servo_motor     outport=O_triple_2      \
                                outsignal=o_triple_2    \
                                freq_hz=C_CLK_FREQ_HZ   \
                                min_width=1000us        \
                                max_width=1500us        \
                                sync=o_triple_0

PORTCOMMENT program termination
OUTPORT 1-bit o_done O_DONE