URL
https://opencores.org/ocsvn/t400/t400/trunk
Subversion Repositories t400
[/] [t400/] [trunk/] [sw/] [verif/] [black_box/] [xds/] [test.asm] - Rev 2
Go to most recent revision | Compare with Previous | Blame | View Log
;; *******************************************************************;; $Id: test.asm,v 1.1.1.1 2006-05-06 01:56:45 arniml Exp $;;;; Checks the XDS instruction.;;;; the cpu type is defined on asl's command lineorg 0x00clra;; *******************************************************************;; XOR 0jsr init_ram;; xor 0 in digit 0lbi 0, 0jsr init_bd;;xds 0 ; 0, 3 = 0x3;;cbaxds 0 ; 0, 2 = 0x2;;cbaxds 0 ; 0, 1 = 0x1;;cbaxds 0 ; 0, 0 = 0x0jmp fail;; xor 0 in digit 1lbi 1, 0jsr init_bd;;aisc 1 << 2xds 0 ; 1, 3 = 0x7;;cbaaisc 1 << 2xds 0 ; 1, 2 = 0x6;;cbaaisc 1 << 2xds 0 ; 1, 1 = 0x5;;cbaaisc 1 << 2xds 0 ; 1, 0 = 0x4jmp fail;; xor 0 in digit 2lbi 2, 0jsr init_bd;;aisc 2 << 2xds 0 ; 2, 3 = 0xb;;cbaaisc 2 << 2xds 0 ; 2, 2 = 0xa;;cbaaisc 2 << 2xds 0 ; 2, 1 = 0x9;;cbaaisc 2 << 2xds 0 ; 2, 0 = 0x8jmp fail;; xor 0 in digit 3lbi 3, 0jsr init_bd;;aisc 3 << 2xds 0 ; 3, 3 = 0xf;;cbaaisc 3 << 2xds 0 ; 3, 2 = 0xe;;cbaaisc 3 << 2xds 0 ; 3, 1 = 0xd;;cbaaisc 3 << 2xds 0 ; 3, 0 = 0xcjmp fail;; check remaining Br == 3clracabaisc 0xcskejmp failjsr check_ram;; *******************************************************************;; XOR 1jsr init_ram;;;; xor 1 in digit 0 & 1;;lbi 0, 0jsr init_bd;;xds 1 ; 0, 3 = 0x3;;cbaaisc 1 << 2xds 1 ; 1, 2 = 0x6;;cbaxds 1 ; 0, 1 = 0x1;;cbaaisc 1 << 2xds 1 ; 1, 0 = 0x4jmp fail;; check remaining Br == 0clracabaisc 0xf ; RAM init valueskejmp fail;; reload to Br = 1lbi 1, 0jsr init_bd;;aisc 1 << 2xds 1 ; 1, 3 = 0x7;;cbaxds 1 ; 0, 2 = 0x2;;cbaaisc 1 << 2xds 1 ; 1, 1 = 0x5;;cbaxds 1 ; 0, 0 = 0x0jmp fail;; check remaining Br == 1clracabaisc 0x4skejmp fail;;;; xor 1 in digit 2 & 3;;lbi 2, 0jsr init_bd;;aisc 2 << 2xds 1 ; 2, 3 = 0xb;;cbaaisc 3 << 2xds 1 ; 3, 2 = 0xe;;cbaaisc 2 << 2xds 1 ; 2, 1 = 0x9;;cbaaisc 3 << 2xds 1 ; 3, 0 = 0xcjmp fail;; check remaining Br == 2clracabaisc 0x7 ; RAM init valueskejmp fail;; reload to Br = 3lbi 3, 0jsr init_bd;;aisc 3 << 2xds 1 ; 3, 3 = 0xf;;cbaaisc 2 << 2xds 1 ; 2, 2 = 0xa;;cbaaisc 3 << 2xds 1 ; 3, 1 = 0xd;;cbaaisc 2 << 2xds 1 ; 2, 0 = 0x8jmp fail;; check remaining Br == 3clracabaisc 0xcskejmp failjsr check_ram;; *******************************************************************;; XOR 2jsr init_ram;;;; xor 2 in digit 0 & 2;;lbi 0, 0jsr init_bd;;xds 2 ; 0, 3 = 0x3;;cbaaisc 2 << 2xds 2 ; 2, 2 = 0xa;;cbaxds 2 ; 0, 1 = 0x1;;cbaaisc 2 << 2xds 2 ; 2, 0 = 0x8jmp fail;; check remainig Br == 0clracabaisc 0xf ; RAM init valueskejmp fail;; reload to Br == 2lbi 2, 0jsr init_bd;;aisc 2 << 2xds 2 ; 2, 3 = 0xb;;cbaxds 2 ; 0, 2 = 0x2;;cbaaisc 2 << 2xds 2 ; 2, 1 = 0x9;;cbaxds 2 ; 0, 0 = 0x0jmp fail;; check remainig Br == 2clracabaisc 0x8skejmp fail;;;; xor 2 in digit 1 & 3;;lbi 1, 0jsr init_bd;;aisc 1 << 2xds 2 ; 1, 3 = 0x7;;cbaaisc 3 << 2xds 2 ; 3, 2 = 0xe;;cbaaisc 1 << 2xds 2 ; 1, 1 = 0x5;;cbaaisc 3 << 2xds 2 ; 3, 0 = 0xcjmp fail;; check remaining Br == 1clracabaisc 0xc ; RAM init valueskejmp fail;; reload to Br = 3lbi 3, 0jsr init_bd;;aisc 3 << 2xds 2 ; 3, 3 = 0xf;;cbaaisc 1 << 2xds 2 ; 1, 2 = 0x6;;cbaaisc 3 << 2xds 2 ; 3, 1 = 0xd;;cbaaisc 1 << 2xds 2 ; 1, 0 = 0x4jmp fail;; check remaining Br == 3clracabaisc 0xcskejmp failjsr check_ram;; *******************************************************************;; XOR 3jsr init_ram;;;; xor 3 in digit 0 & 3;;lbi 0, 0jsr init_bd;;xds 3 ; 0, 3 = 0x3;;cbaaisc 3 << 2xds 3 ; 3, 2 = 0xe;;cbaxds 3 ; 0, 1 = 0x1;;cbaaisc 3 << 2xds 3 ; 3, 0 = 0xcjmp fail;; check remaining BR == 0clracabaisc 0xf ; RAM init valueskejmp fail;; reload BR = 3lbi 3, 0jsr init_bd;;aisc 3 << 2xds 3 ; 3, 3 = 0xf;;cbaxds 3 ; 0, 2 = 0x2;;cbaaisc 3 << 2xds 3 ; 3, 1 = 0xb;;cbaxds 3 ; 0, 0 = 0x0jmp fail;; check remaining BR == 3clracabaisc 0xcskejmp fail;;;; xor 3 in digit 1 & 2;;lbi 1, 0jsr init_bd;;aisc 1 << 2xds 3 ; 1, 3 = 0x7;;cbaaisc 2 << 2xds 3 ; 2, 2 = 0xa;;cbaaisc 1 << 2xds 3 ; 1, 1 = 0x5;;cbaaisc 2 << 2xds 3 ; 2, 0 = 0x8jmp fail;; check remaining BR == 1clracabaisc 0xc ; RAM init valueskejmp fail;; reload BR = 2lbi 2, 0jsr init_bd;;aisc 2 << 2xds 3 ; 2, 3 = 0xb;;cbaaisc 1 << 2xds 3 ; 1, 2 = 0x6;;cbaaisc 2 << 2xds 3 ; 2, 1 = 0x9;;cbaaisc 1 << 2xds 3 ; 1, 0 = 0x5jmp fail;; check remaining BR == 2clracabaisc 0x8skejmp failjsr check_ramjmp passorg 0x158;; initializes Bd to 3init_bd:clraaisc 0x3cabret;; preload digits of each data registerinit_ram:;; Br = 0lbi 0, 0stii 0xfstii 0xestii 0xdstii 0xb;; Br = 1lbi 1, 0stii 0xcstii 0xastii 0x9stii 0x8;; Br = 2lbi 2, 0stii 0x7stii 0x6stii 0x5stii 0x4;; Br = 3lbi 3, 0stii 0x3stii 0x2stii 0x1stii 0x0retcheck MACRO dig;; check dig, 0clraIF dig > 0aisc dig << 2ENDIFskejmp fail;; check 0, 1clraaisc 0x1cabIF dig > 0aisc dig << 2ENDIFskejmp fail;; check 0, 2clraaisc 0x2cabIF dig > 0aisc dig << 2ENDIFskejmp fail;; check 0, 3clraaisc 0x3cabIF dig > 0aisc dig << 2ENDIFskejmp failENDM;; check contents of RAM entriescheck_ram:;; check digit 0lbi 0, 0check 0;; check digit 1lbi 1, 0check 1;; check digit 2lbi 2, 0check 2;; check digit 3lbi 3, 0check 3retinclude "pass_fail.asm"
Go to most recent revision | Compare with Previous | Blame | View Log