URL
https://opencores.org/ocsvn/t48/t48/trunk
Subversion Repositories t48
[/] [t48/] [tags/] [rel_1_3/] [syn/] [t8048/] [jopcyc/] [t8048.qsf] - Rev 343
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set_global_assignment -name TOP_LEVEL_ENTITY t8048
# Copyright (C) 1991-2005 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions
# and other software and tools, and its AMPP partner logic
# functions, and any output files any of the foregoing
# (including device programming or simulation files), and any
# associated documentation or information are expressly subject
# to the terms and conditions of the Altera Program License
# Subscription Agreement, Altera MegaCore Function License
# Agreement, or other applicable license agreement, including,
# without limitation, that your use is for the sole purpose of
# programming logic devices manufactured by Altera and sold by
# Altera or its authorized distributors. Please refer to the
# applicable agreement for further details.
# The default values for assignments are stored in the file
# t8048_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
# assignment_defaults.qdf
# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.
# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "4.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "22:20:14 MAY 08, 2004"
set_global_assignment -name LAST_QUARTUS_VERSION 7.0
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/t48_pack-p.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/pmem_ctrl_pack-p.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/cond_branch_pack-p.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/decoder_pack-p.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/dmem_ctrl_pack-p.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/alu_pack-p.vhd"
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/alu.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/bus_mux.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/clock_ctrl.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/cond_branch.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/db_bus.vhd
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/t48_comp_pack-p.vhd"
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/decoder.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/dmem_ctrl.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/int.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/p1.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/p2.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/pmem_ctrl.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/psw.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/timer.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/t48_core.vhd
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/generic_ram_ena.vhd
set_global_assignment -name VHDL_FILE t48_rom.vhd
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/system/t48_rom-e.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/system/t48_rom-struct-a.vhd"
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/t48_core_comp_pack-p.vhd"
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t8048_notri.vhd
set_global_assignment -name VHDL_FILE "../../../rtl/vhdl/system/t48_system_comp_pack-p.vhd"
set_global_assignment -name VHDL_FILE ../../../rtl/vhdl/system/t8048.vhd
# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name VHDL_INPUT_VERSION VHDL87
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name DEVICE EP1C12Q240C8
set_global_assignment -name RESERVE_ALL_UNUSED_PINS "AS INPUT TRI-STATED WITH WEAK PULL-UP"
set_global_assignment -name RESERVE_ASDO_AFTER_CONFIGURATION "AS INPUT TRI-STATED"
set_global_assignment -name FMAX_REQUIREMENT "11 MHz" -section_id xtal
set_instance_assignment -name CLOCK_SETTINGS xtal -to xtal_i
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