URL
https://opencores.org/ocsvn/test_project/test_project/trunk
Subversion Repositories test_project
[/] [test_project/] [trunk/] [rtl/] [verilog/] [components/] [uart16550/] [Makefile] - Rev 18
Compare with Previous | Blame | View Log
uart_ip:cat raminfr.v uart_sync_flops.v uart_regs.v uart_rfifo.v uart_tfifo.v uart_receiver.v uart_transmitter.v uart_debug_if.v uart_wb.v uart_top.v > uart_ip.vall: uart_ip