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[/] [timerocd/] [trunk/] [xilinx/] [TimerOCD/] [ipcore_dir/] [coregen.cgc] - Rev 2

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               <xilinx:simulationOptions>
                  <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
                  <xilinx:simulationLanguage>VHDL</xilinx:simulationLanguage>
                  <xilinx:foundationSym>false</xilinx:foundationSym>
               </xilinx:simulationOptions>
               <xilinx:packageInfo>
                  <xilinx:sourceCoreCreationDate>2012-11-19+16:22</xilinx:sourceCoreCreationDate>
               </xilinx:packageInfo>
            </xilinx:instanceProperties>
         </spirit:vendorExtensions>
      </spirit:componentInstance>
   </spirit:componentInstances>
   <spirit:vendorExtensions>
      <xilinx:instanceProperties>
         <xilinx:projectOptions>
            <xilinx:projectName>coregen</xilinx:projectName>
            <xilinx:outputDirectory>./</xilinx:outputDirectory>
            <xilinx:workingDirectory>./tmp/</xilinx:workingDirectory>
            <xilinx:subWorkingDirectory>./tmp/_cg/</xilinx:subWorkingDirectory>
         </xilinx:projectOptions>
         <xilinx:part>
            <xilinx:device>xc6slx9</xilinx:device>
            <xilinx:deviceFamily>spartan6</xilinx:deviceFamily>
            <xilinx:package>tqg144</xilinx:package>
            <xilinx:speedGrade>-2</xilinx:speedGrade>
         </xilinx:part>
         <xilinx:flowOptions>
            <xilinx:busFormat>BusFormatAngleBracketNotRipped</xilinx:busFormat>
            <xilinx:designEntry>VHDL</xilinx:designEntry>
            <xilinx:asySymbol>true</xilinx:asySymbol>
            <xilinx:flowVendor>Other</xilinx:flowVendor>
            <xilinx:addPads>false</xilinx:addPads>
            <xilinx:removeRPMs>false</xilinx:removeRPMs>
            <xilinx:createNDF>false</xilinx:createNDF>
            <xilinx:implementationFileType>Ngc</xilinx:implementationFileType>
            <xilinx:formalVerification>false</xilinx:formalVerification>
         </xilinx:flowOptions>
         <xilinx:simulationOptions>
            <xilinx:simulationModel>Behavioral</xilinx:simulationModel>
            <xilinx:simulationLanguage>VHDL</xilinx:simulationLanguage>
            <xilinx:foundationSym>false</xilinx:foundationSym>
         </xilinx:simulationOptions>
      </xilinx:instanceProperties>
   </spirit:vendorExtensions>
</spirit:design>

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