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https://opencores.org/ocsvn/tinyvliw8/tinyvliw8/trunk
Subversion Repositories tinyvliw8
[/] [tinyvliw8/] [trunk/] [design/] [AlteraDK1/] [instMem.qip] - Rev 10
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set_global_assignment -name IP_TOOL_NAME "RAM: 1-PORT"
set_global_assignment -name IP_TOOL_VERSION "11.1"
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "instMem.vhd"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "instMem_inst.vhd"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "instMem.cmp"]
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