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URL https://opencores.org/ocsvn/tlc2/tlc2/trunk

Subversion Repositories tlc2

[/] [tlc2/] [trunk/] [modelsim/] [work/] [_info] - Rev 4

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m255
K3
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Z0 cModel Technology
Z1 d/export/jack/dimo/vhdl/tlc2
T_opt
V0>dXfFb=W24Q[dPk7mTFH3
04 7 8 work tlc2_tb behavior 1
Z2 =3-001636847494-4857da9b-3a2c3-66cb
Z3 o-quiet -auto_acc_if_foreign -work work
Z4 tExplicit 1
Z5 OL;O;6.3d;37
Etlc2
Z6 w1213717120
Z7 DPx4 ieee 11 numeric_std 0 22 =NSdli^?T5OD8;4F<blj<3
Z8 DPx4 ieee 14 std_logic_1164 0 22 GH1=`jDDBJ=`LM;:Ak`kf2
Z9 8src/tlc2.vhd
Z10 Fsrc/tlc2.vhd
l0
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Z11 Vz>cgb0eea`gLaQP=1inVA2
Z12 OL;C;6.3d;37
32
R4
Abehavioral
R7
R8
Z13 DEx4 work 4 tlc2 0 22 z>cgb0eea`gLaQP=1inVA2
l28
L18
Z14 VYDEJECD57LKz:[[od;1_V0
R12
32
Z15 Mx2 4 ieee 14 std_logic_1164
Z16 Mx1 4 ieee 11 numeric_std
R4
Etlc2_tb
Z17 w1210753914
R7
R8
Z18 8src/tlc2_tb.vhd
Z19 Fsrc/tlc2_tb.vhd
l0
L33
Z20 VL6[DR2;]DnF7oV@jf8n4?2
R12
32
R4
Abehavior
R7
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Z21 DEx4 work 7 tlc2_tb 0 22 L6[DR2;]DnF7oV@jf8n4?2
l55
L36
Z22 V0C2SIHCb;J2KNV?ilnf[43
R12
32
R15
R16
R4

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