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[/] [turbo8051/] [trunk/] [verif/] [log/] [uart_test_1.log] - Rev 76
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Reading D:/Microsemi/Libero_v10.1/Model/tcl/vsim/pref.tcl# 10.1b# vsim +uart_test_1 -do run.do -c tb_top# // ModelSim ACTEL 10.1b Apr 27 2012# //# // Copyright 1991-2012 Mentor Graphics Corporation# // All Rights Reserved.# //# // THIS WORK CONTAINS TRADE SECRET AND PROPRIETARY INFORMATION# // WHICH IS THE PROPERTY OF MENTOR GRAPHICS CORPORATION OR ITS# // LICENSORS AND IS SUBJECT TO LICENSE TERMS.# //# Loading sv_std.std# Loading work.tb_top# Loading work.digital_core# Loading work.clkgen# Loading work.clk_ctl# Loading work.wb_crossbar# Loading work.g_mac_top# Loading work.g_dpath_ctrl# Loading work.g_eth_parser# Loading work.g_mac_core# Loading work.g_rx_top# Loading work.g_rx_fsm# Loading work.half_dup_dble_reg# Loading work.g_rx_crc32# Loading work.g_deferral_rx# Loading work.g_md_intf# Loading work.g_tx_top# Loading work.g_deferral# Loading work.g_tx_fsm# Loading work.g_tx_crc32# Loading work.toggle_sync# Loading work.g_cfg_mgmt# Loading work.s2f_sync# Loading work.generic_register# Loading work.req_register# Loading work.stat_counter# Loading work.generic_intr_stat_reg# Loading work.g_mii_intf# Loading work.async_fifo# Loading work.wb_rd_mem2mem# Loading work.wb_wr_mem2mem# Loading work.uart_core# Loading work.uart_cfg# Loading work.stat_register# Loading work.uart_txfsm# Loading work.uart_rxfsm# Loading work.double_sync_low# Loading work.spi_core# Loading work.spi_if# Loading work.spi_ctl# Loading work.spi_cfg# Loading work.oc8051_top# Loading work.oc8051_decoder# Loading work.oc8051_alu# Loading work.oc8051_multiply# Loading work.oc8051_divide# Loading work.oc8051_ram_top# Loading work.oc8051_ram_256x8_two_bist# Loading work.oc8051_alu_src_sel# Loading work.oc8051_comp# Loading work.oc8051_cy_select# Loading work.oc8051_indi_addr# Loading work.oc8051_memory_interface# Loading work.oc8051_sfr# Loading work.oc8051_acc# Loading work.oc8051_b_register# Loading work.oc8051_sp# Loading work.oc8051_dptr# Loading work.oc8051_psw# Loading work.oc8051_ports# Loading work.oc8051_int# Loading work.oc8051_tc# Loading work.oc8051_tc2# Loading work.oc8051_xrom# Loading work.oc8051_xram# Loading work.tb_eth_top# Loading work.tb_mii# Loading work.tb_rmii# Loading work.uart_agent# Loading work.m25p20# Loading work.memory_access# Loading work.acdc_check# Loading work.internal_logic# Loading work.AT45DB321# Loading work.tb_glbl# Loading work.bit_register# ** Warning: (vsim-PLI-3003) ../tb/tb_top.v(397): [TOFD] - System task or function '$shm_open' is not defined.## Region: /tb_top# ** Warning: (vsim-PLI-3003) ../tb/tb_top.v(398): [TOFD] - System task or function '$shm_probe' is not defined.## Region: /tb_top# ** Warning: (vsim-3017) ../tb/tb_top.v(235): [TFMPC] - Too few port connections. Expected 50, found 44.## Region: /tb_top/u_core# ** Warning: (vsim-3015) ../tb/tb_top.v(235): [PCDPC] - Port size (8 or 8) does not match connection size (4) for port 'phy_txd'. The port definition is at: ../../rtl/core/digital_core.v(29).## Region: /tb_top/u_core# ** Warning: (vsim-3015) ../tb/tb_top.v(235): [PCDPC] - Port size (8 or 8) does not match connection size (4) for port 'phy_rxd'. The port definition is at: ../../rtl/core/digital_core.v(35).## Region: /tb_top/u_core# ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'scan_mode'.## ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'scan_enable'.## ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_clk'.## ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_in'.## ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_out'.## ** Warning: (vsim-3722) ../tb/tb_top.v(235): [TFMPC] - Missing connection for port 'mdio_out_en'.## ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(214): [TFMPC] - Too few port connections. Expected 14, found 12.## Region: /tb_top/u_core/u_uart_core/u_rxfifo# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(214): [TFMPC] - Missing connection for port 'afull'.## ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(214): [TFMPC] - Missing connection for port 'aempty'.## ** Warning: (vsim-3017) ../../rtl/uart/uart_core.v(230): [TFMPC] - Too few port connections. Expected 14, found 12.## Region: /tb_top/u_core/u_uart_core/u_txfifo# ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(230): [TFMPC] - Missing connection for port 'afull'.## ** Warning: (vsim-3722) ../../rtl/uart/uart_core.v(230): [TFMPC] - Missing connection for port 'aempty'.## do run.do# i : 00# i : 00# i : 00# i : 00# i : 00# i : 00# i : 00# i : 00# i : 00# i : 00# NOTE : Load memory with Initial delivery content# NOTE : Initial Load End# --> Dumpping the design# NOTE: COMMUNICATION (RE)STARTED# Config-Write: Id: 3 Addr = 0000, Cfg. Data = 00000017## ... Writing char 24 ...# ... Write data 24 to UART done cnt : 1 ...### ... Writing char 81 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 24# ... Read Data from UART done cnt : 1...# ... Write data 81 to UART done cnt : 2 ...### ... Writing char 09 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 81# ... Read Data from UART done cnt : 2...# ... Write data 09 to UART done cnt : 3 ...### ... Writing char 63 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 09# ... Read Data from UART done cnt : 3...# ... Write data 63 to UART done cnt : 4 ...### ... Writing char 0d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 63# ... Read Data from UART done cnt : 4...# ... Write data 0d to UART done cnt : 5 ...### ... Writing char 8d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d# ... Read Data from UART done cnt : 5...# ... Write data 8d to UART done cnt : 6 ...### ... Writing char 65 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8d# ... Read Data from UART done cnt : 6...# ... Write data 65 to UART done cnt : 7 ...### ... Writing char 12 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 65# ... Read Data from UART done cnt : 7...# ... Write data 12 to UART done cnt : 8 ...### ... Writing char 01 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 12# ... Read Data from UART done cnt : 8...# ... Write data 01 to UART done cnt : 9 ...### ... Writing char 0d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 01# ... Read Data from UART done cnt : 9...# ... Write data 0d to UART done cnt : 10 ...### ... Writing char 76 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d# ... Read Data from UART done cnt : 10...# ... Write data 76 to UART done cnt : 11 ...### ... Writing char 3d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 76# ... Read Data from UART done cnt : 11...# ... Write data 3d to UART done cnt : 12 ...### ... Writing char ed ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 3d# ... Read Data from UART done cnt : 12...# ... Write data ed to UART done cnt : 13 ...### ... Writing char 8c ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match ed# ... Read Data from UART done cnt : 13...# ... Write data 8c to UART done cnt : 14 ...### ... Writing char f9 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8c# ... Read Data from UART done cnt : 14...# ... Write data f9 to UART done cnt : 15 ...### ... Writing char c6 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match f9# ... Read Data from UART done cnt : 15...# ... Write data c6 to UART done cnt : 16 ...### ... Writing char c5 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match c6# ... Read Data from UART done cnt : 16...# ... Write data c5 to UART done cnt : 17 ...### ... Writing char aa ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match c5# ... Read Data from UART done cnt : 17...# ... Write data aa to UART done cnt : 18 ...### ... Writing char e5 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match aa# ... Read Data from UART done cnt : 18...# ... Write data e5 to UART done cnt : 19 ...### ... Writing char 77 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match e5# ... Read Data from UART done cnt : 19...# ... Write data 77 to UART done cnt : 20 ...### ... Writing char 12 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 77# ... Read Data from UART done cnt : 20...# ... Write data 12 to UART done cnt : 21 ...### ... Writing char 8f ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 12# ... Read Data from UART done cnt : 21...# ... Write data 8f to UART done cnt : 22 ...### ... Writing char f2 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 8f# ... Read Data from UART done cnt : 22...# ... Write data f2 to UART done cnt : 23 ...### ... Writing char ce ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match f2# ... Read Data from UART done cnt : 23...# ... Write data ce to UART done cnt : 24 ...### ... Writing char e8 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match ce# ... Read Data from UART done cnt : 24...# ... Write data e8 to UART done cnt : 25 ...### ... Writing char c5 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match e8# ... Read Data from UART done cnt : 25...# ... Write data c5 to UART done cnt : 26 ...### ... Writing char 5c ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match c5# ... Read Data from UART done cnt : 26...# ... Write data 5c to UART done cnt : 27 ...### ... Writing char bd ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 5c# ... Read Data from UART done cnt : 27...# ... Write data bd to UART done cnt : 28 ...### ... Writing char 2d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match bd# ... Read Data from UART done cnt : 28...# ... Write data 2d to UART done cnt : 29 ...### ... Writing char 65 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 2d# ... Read Data from UART done cnt : 29...# ... Write data 65 to UART done cnt : 30 ...### ... Writing char 63 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 65# ... Read Data from UART done cnt : 30...# ... Write data 63 to UART done cnt : 31 ...### ... Writing char 0a ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 63# ... Read Data from UART done cnt : 31...# ... Write data 0a to UART done cnt : 32 ...### ... Writing char 80 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0a# ... Read Data from UART done cnt : 32...# ... Write data 80 to UART done cnt : 33 ...### ... Writing char 20 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 80# ... Read Data from UART done cnt : 33...# ... Write data 20 to UART done cnt : 34 ...### ... Writing char aa ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 20# ... Read Data from UART done cnt : 34...# ... Write data aa to UART done cnt : 35 ...### ... Writing char 9d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match aa# ... Read Data from UART done cnt : 35...# ... Write data 9d to UART done cnt : 36 ...### ... Writing char 96 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 9d# ... Read Data from UART done cnt : 36...# ... Write data 96 to UART done cnt : 37 ...### ... Writing char 13 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 96# ... Read Data from UART done cnt : 37...# ... Write data 13 to UART done cnt : 38 ...### ... Writing char 0d ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 13# ... Read Data from UART done cnt : 38...# ... Write data 0d to UART done cnt : 39 ...### ... Writing char 53 ...# (tb_top.tb_uart.read_char_chk.loop_2) Data match 0d# ... Read Data from UART done cnt : 39...# ... Write data 53 to UART done cnt : 40 ...## (tb_top.tb_uart.read_char_chk.loop_2) Data match 53# ... Read Data from UART done cnt : 40...# -------------------- Reporting Configuration --------------------# Data bit number setting is : 8# Stop bit number setting is : 1# Divisor of Uart clock is : 3# Parity is enable# Even parity setting# FIFO mode is disable# -----------------------------------------------------------------# -------------------- Reporting Status --------------------## Number of character received is : 40# Number of character sent is : 40# Number of parity error rxd is : 0# Number of stop1 error rxd is : 0# Number of stop2 error rxd is : 0# Number of timeout error is : 0# Number of error is : 0# -----------------------------------------------------------------## -------------------------------------------------# Test Status# warnings: 0, errors: 0## -------------------------------------------------# Test Status# warnings: 0, errors: 0## =========# Test Status: TEST PASSED# =========#