URL
https://opencores.org/ocsvn/turbo8051/turbo8051/trunk
Subversion Repositories turbo8051
[/] [turbo8051/] [trunk/] [verif/] [run/] [compile.modelsim] - Rev 61
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#!/bin/csh
if(! -e work) then
vlib work
endif
vlog -work work +define+SFLASH_SPDUP \
-v ../../rtl/lib/registers.v \
-v ../../rtl/lib/stat_counter.v \
-v ../../rtl/lib/toggle_sync.v \
-v ../../rtl/lib/double_sync_low.v \
-v ../../rtl/lib/async_fifo.v \
./time_scale.v \
../tb/tb_top.v \
../../verif/agents/ethernet/tb_eth_top.v \
../../verif/agents/ethernet/tb_mii.v \
../../verif/agents/ethernet/tb_rmii.v \
../../verif/agents/uart/uart_agent.v \
../../verif/agents/spi/atmel/AT45DBXXX_v2.0.3.v \
../../verif/agents/spi/st_m25p20a/acdc_check.v \
../../verif/agents/spi/st_m25p20a/internal_logic.v \
../../verif/agents/spi/st_m25p20a/memory_access.v \
../../verif/agents/spi/st_m25p20a/M25P20.v \
../../verif/model/oc8051_xram.v \
../../verif/model/oc8051_xrom.v \
../../rtl/core/core.v \
../../rtl/gmac/top/g_mac_top.v \
../../rtl/gmac/mac/dble_reg.v \
../../rtl/gmac/mac/g_tx_fsm.v \
../../rtl/gmac/mac/g_deferral.v \
../../rtl/gmac/mac/g_tx_top.v \
../../rtl/gmac/mac/g_rx_fsm.v \
../../rtl/gmac/mac/g_cfg_mgmt.v \
../../rtl/gmac/mac/s2f_sync.v \
../../rtl/gmac/mac/g_md_intf.v \
../../rtl/gmac/mac/g_deferral_rx.v \
../../rtl/gmac/mac/g_rx_top.v \
../../rtl/gmac/mac/g_mii_intf.v \
../../rtl/gmac/mac/g_mac_core.v \
../../rtl/gmac/ctrl/eth_parser.v \
../../rtl/gmac/crc32/g_rx_crc32.v \
../../rtl/gmac/crc32/g_tx_crc32.v \
../../rtl/lib/async_fifo.v \
../../rtl/lib/g_dpath_ctrl.v \
../../rtl/spi/spi_core.v \
../../rtl/spi/spi_ctl.v \
../../rtl/spi/spi_if.v \
../../rtl/spi/spi_cfg.v \
../../rtl/uart/uart_rxfsm.v \
../../rtl/uart/uart_txfsm.v \
../../rtl/uart/uart_core.v \
../../rtl/uart/uart_cfg.v \
../../rtl/clkgen/clkgen.v \
../../rtl/lib/clk_ctl.v \
../../rtl/lib/wb_crossbar.v \
../../rtl/lib/wb_rd_mem2mem.v \
../../rtl/lib/wb_wr_mem2mem.v \
../../rtl/8051/oc8051_top.v \
../../rtl/8051/oc8051_rom.v \
../../rtl/8051/oc8051_alu_src_sel.v \
../../rtl/8051/oc8051_alu.v \
../../rtl/8051/oc8051_decoder.v \
../../rtl/8051/oc8051_divide.v \
../../rtl/8051/oc8051_multiply.v \
../../rtl/8051/oc8051_memory_interface.v \
../../rtl/8051/oc8051_ram_top.v \
../../rtl/8051/oc8051_acc.v \
../../rtl/8051/oc8051_comp.v \
../../rtl/8051/oc8051_sp.v \
../../rtl/8051/oc8051_dptr.v \
../../rtl/8051/oc8051_cy_select.v \
../../rtl/8051/oc8051_psw.v \
../../rtl/8051/oc8051_indi_addr.v \
../../rtl/8051/oc8051_ports.v \
../../rtl/8051/oc8051_b_register.v \
../../rtl/8051/oc8051_uart.v \
../../rtl/8051/oc8051_int.v \
../../rtl/8051/oc8051_tc.v \
../../rtl/8051/oc8051_tc2.v \
../../rtl/8051/oc8051_sfr.v \
../../rtl/8051/oc8051_ram_256x8_two_bist.v
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