URL https://opencores.org/ocsvn/uart16750/uart16750/trunk

Subversion Repositories uart16750

[/] [uart16750/] [trunk/] [sim/] [rtl_sim/] [run/] [start_simulation.do] - Rev 17

perl sim/create_uart_stim.pl > sim/uart_stim.dat
vsim uart_transactor
do sim/tb_uart_wave.do
run