OpenCores
URL https://opencores.org/ocsvn/uart16750/uart16750/trunk

Subversion Repositories uart16750

[/] [uart16750/] [trunk/] [syn/] [Altera/] [CycloneII/] [UART16750.map.summary] - Rev 16

Go to most recent revision | Compare with Previous | Blame | View Log

Analysis & Synthesis Status : Successful - Tue Feb 17 23:02:31 2009
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Full Version
Revision Name : UART16750
Top-level Entity Name : UART16750
Family : Cyclone II
Total logic elements : 417
    Total combinational functions : 417
    Dedicated logic registers : 293
Total registers : 293
Total pins : 36
Total virtual pins : 0
Total memory bits : 1,216
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0

Go to most recent revision | Compare with Previous | Blame | View Log

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.