URL
https://opencores.org/ocsvn/uart16750/uart16750/trunk
Subversion Repositories uart16750
[/] [uart16750/] [trunk/] [syn/] [Altera/] [CycloneII/] [slib_clock_div.bsf] - Rev 16
Go to most recent revision | Compare with Previous | Blame | View Log
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
*/
(header "symbol" (version "1.1"))
(symbol
(rect 16 16 112 112)
(text "slib_clock_div" (rect 5 0 74 12)(font "Arial" ))
(text "inst" (rect 8 80 25 92)(font "Arial" ))
(port
(pt 0 32)
(input)
(text "CLK" (rect 0 0 21 12)(font "Arial" ))
(text "CLK" (rect 21 27 42 39)(font "Arial" ))
(line (pt 0 32)(pt 16 32)(line_width 1))
)
(port
(pt 0 48)
(input)
(text "RST" (rect 0 0 21 12)(font "Arial" ))
(text "RST" (rect 21 43 42 55)(font "Arial" ))
(line (pt 0 48)(pt 16 48)(line_width 1))
)
(port
(pt 0 64)
(input)
(text "CE" (rect 0 0 15 12)(font "Arial" ))
(text "CE" (rect 21 59 36 71)(font "Arial" ))
(line (pt 0 64)(pt 16 64)(line_width 1))
)
(port
(pt 96 32)
(output)
(text "Q" (rect 0 0 8 12)(font "Arial" ))
(text "Q" (rect 67 27 75 39)(font "Arial" ))
(line (pt 96 32)(pt 80 32)(line_width 1))
)
(parameter
"RATIO"
"4"
""
)
(drawing
(rectangle (rect 16 16 80 80)(line_width 1))
)
(annotation_block (parameter)(rect 112 -64 212 16))
)
Go to most recent revision | Compare with Previous | Blame | View Log